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Patent # Description
2018/0277559 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
A semiconductor memory device includes a stacked body in which electrode films and insulating films are stacked alternately along a first direction, a...
2018/0277558 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided herein is a semiconductor device. The semiconductor device may include conductive layers each including a line, and a pad which is coupled with the...
2018/0277557 FLASH MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
A method for manufacturing a flash memory device includes providing a substrate structure including a substrate, an insulating layer on the substrate, and a...
2018/0277556 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided herein may be a semiconductor device. The semiconductor device may include a stack, channel holes passing through the stack, dummy channel holes...
2018/0277555 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFATURING SAME
According to one embodiment, a semiconductor device includes a foundation layer, a stacked body provided above the foundation layer, a semiconductor body, and...
2018/0277554 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a first electrode layer and a second electrode layer formed thereon to be spaced from the first electrode layer, a columnar...
2018/0277553 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
In a method of manufacturing a semiconductor device including a non-volatile memory formed in a memory cell area and a logic circuit formed in a peripheral...
2018/0277552 Floating memristor
A floating memristor with a nano-battery between a top and bottom floating gates is disclosed. The floating memristor includes a nano-battery, a top floating...
2018/0277551 COST-FREE MTP MEMORY STRUCTURE WITH REDUCED TERMINAL VOLTAGES
Device and methods for forming a single transistor non-volatile (NV) multi-time programmable (MTP) memory cell are disclosed. The disclosed memory cell is...
2018/0277550 FERROELECTRIC MEMORY DEVICE
A ferroelectric memory device includes a substrate, a ferroelectric structure having a first ferroelectric material layer, an electrical floating layer, and a...
2018/0277549 PADS AND PIN-OUTS IN THREE DIMENSIONAL INTEGRATED CIRCUITS
A three dimensional semiconductor device, comprising: a substrate including a plurality of circuits; a plurality of pads, each pad coupled to a circuit; and a...
2018/0277548 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided is a semiconductor device which has a non-volatile memory including: a semiconductor substrate; a tunnel insulating film formed on a surface of the...
2018/0277547 INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME
A method includes providing a plurality of active regions on a substrate, and at least a first device isolation layer between two of the plurality of active...
2018/0277546 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FORMING THE SAME
A semiconductor memory device and a method of forming the same, the semiconductor memory device includes a substrate, a plurality of bit lines, a gate, a...
2018/0277545 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating a semiconductor device includes the steps of: providing a substrate having a cell region and a peripheral region; forming a first...
2018/0277544 INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF
An integrated circuit includes a substrate, at least one n-type semiconductor device, and at least one p-type semiconductor device. The n-type semiconductor...
2018/0277543 SEMICONDUCTOR DEVICE
A semiconductor device includes: channel patterns disposed on a substrate; a pair of source/drain patterns disposed at first and second sides of each of the...
2018/0277542 SEMICONDUCTOR DEVICE
A semiconductor device includes a first transistor. The first transistor includes a first terminal, a first contact, a second terminal, and a second contact....
2018/0277541 CONTACT FORMATION IN SEMICONDUCTOR DEVICES
A technique relates to fabricating a pFET device and nFET device. A contact trench is formed through an inter-level dielectric layer (ILD) and a spacer layer....
2018/0277540 STRUCTURE AND METHOD FOR MULTIPLE THRESHOLD VOLTAGE DEFINITION IN ADVANCED CMOS DEVICE TECHNOLOGY
A method of fabricating a semiconductor structure having multiple defined threshold voltages includes: forming multiple field-effect transistor (FET) devices...
2018/0277539 HVMOS Reliability Evaluation using Bulk Resistances as Indices
A method of determining the reliability of a high-voltage PMOS (HVPMOS) device includes determining a bulk resistance of the HVPMOS device, and evaluating the...
2018/0277538 METHOD OF FABRICATING INTEGRATED CIRCUIT
A method includes forming a transistor over a substrate, wherein the transistor includes a source, a drain over the source, a semiconductor channel between the...
2018/0277537 SEMICONDUCTOR INTEGRATED CIRCUIT AND LOGIC CIRCUIT
Disclosed herein is a driver circuit including first and second n-channel transistors connected together in series between first and second nodes. The first...
2018/0277536 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a substrate; a first gate stack disposed on the substrate; a second gate stack disposed on the substrate, wherein a metal...
2018/0277535 NORMALLY OFF III NITRIDE TRANSISTOR
A semiconductor device containing an enhancement mode GaN FET on a III-N layer stack includes a low-doped GaN layer, a barrier layer including aluminum over...
2018/0277534 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a substrate; a first device disposed on the substrate, and the first device includes at least two first gate stacks, in which...
2018/0277533 METHOD FOR FORMING CAPACITOR, SEMICONDUCTOR DEVICE, MODULE, AND ELECTRONIC DEVICE
A miniaturized transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided....
2018/0277532 SEMICONDUCTOR DEVICE HAVING ELECTRO-STATIC DISCHARGE PROTECTION STRUCTURE
A semiconductor device, having an electro-static discharge (ESD) protection structure, comprises: a diode, connected between a gate and a source of the...
2018/0277531 SEMICONDUCTOR DEVICE
A semiconductor device according to an embodiment includes a semiconductor substrate having a first plane and a second plane, a plurality of first...
2018/0277530 METHODS FOR PROCESSING A 3D SEMICONDUCTOR DEVICE
A method for processing a 3D semiconductor device, the method including: providing a wafer including a plurality of first dies, the plurality of first dies...
2018/0277529 SEMICONDUCTOR PACKAGE
A semiconductor package includes a substrate having opposing first and second surfaces, first memory chips stacked on the first surface, second memory chips...
2018/0277528 DISPLAY UNIT
A display unit is provided, on a substrate, with a first wiring layer and a device section. The device section has a plurality of pixels. The device section...
2018/0277527 WAFER LEVEL CHIP SCALE FILTER PACKAGING USING SEMICONDUCTOR WAFERS WITH THROUGH WAFER VIAS
An electronics package includes a semiconductor substrate having one or more passive devices formed thereon and a cavity defined in a first surface thereof. A...
2018/0277526 SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor structure is disclosed. The semiconductor structure includes: a semiconductor substrate including a front surface and a back surface; a...
2018/0277525 MICRO-TRANSFER PRINTED LED AND COLOR FILTER STRUCTURES
A micro-transfer printed intermediate structure comprises an intermediate substrate and one or more pixel structures disposed on the intermediate substrate....
2018/0277524 TRANSFER HEAD AND TRANSFER SYSTEM FOR SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD FOR TRANSFERRING...
The present invention relates to a display device and, more particularly, to a transfer head for a semiconductor light-emitting device applied to the display...
2018/0277523 AUGMENTED REALITY DISPLAY SYSTEMS WITH SUPER-LAMBERTIAN LED SOURCE
Emissive display devices having LED sources with super-lambertian radiation patterns. An exemplary emission source may have a half-emission-cone-angle of less...
2018/0277522 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME
A semiconductor device including a package substrate having, at the periphery of the main surface thereof, bonding leads disposed in a row, a semiconductor...
2018/0277521 3D SEMICONDUCTOR DEVICE AND STRUCTURE
A 3D semiconductor device, the device including: a first single crystal layer including a plurality of first transistors; at least one first metal layer...
2018/0277520 Devices Employing Thermal and Mechanical Enhanced Layers and Methods of Forming Same
A method includes attaching a first-level device die to a dummy die, encapsulating the first-level device die in a first encapsulating material, forming...
2018/0277519 Packages with Stacked Dies and Methods of Forming the Same
A method includes bonding a first plurality of device dies onto a wafer, wherein the wafer includes a second plurality of device dies, with each of the first...
2018/0277518 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
An improvement is achieved in the reliability of a semiconductor device. A first semiconductor chip includes a semiconductor substrate, a wiring structure...
2018/0277517 SEMICONDUCTOR DEVICE
A semiconductor device comprises a first semiconductor chip comprising a first substrate. A first magnetic tunnel junction is on the first substrate. A second...
2018/0277516 SEMICONDUCTOR DEVICE
A semiconductor device includes a first and a second chips. A first inductor is above a first surface or a second surface located on an opposite side to the...
2018/0277515 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A device includes a wiring substrate. A first semiconductor-chip has a first face, a second face, and a first side face between an outer edge of the first face...
2018/0277514 SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate having first and second principal surfaces, and a semiconductor chip disposed on the first principal surface. The...
2018/0277513 SEMICONDUCTOR PACKAGE FOR MULTIPHASE CIRCUITRY DEVICE
In some examples, a device includes a power supply element and a reference voltage element, wherein the reference voltage element is electrically isolated from...
2018/0277512 EMBEDDED-BRIDGE SUBSTRATE CONNECTORS AND METHODS OF ASSEMBLING SAME
An embedded-bridge substrate connector apparatus includes a patterned reference layer to which a first module and a subsequent module are aligned and the two...
2018/0277511 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
To provide a semiconductor device having improved reliability. A method of manufacturing the semiconductor device includes connecting a wire comprised of...
2018/0277510 SELECTIVELY CROSS-LINKED THERMAL INTERFACE MATERIALS
A process of forming a thermal interface material structure includes selectively masking a putty pad that includes ultraviolet (UV) curable cross-linkers to...
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