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Patent # Description
2018/0277458 THROUGH-MOLD STRUCTURES
Devices and methods include an electronic package having a through-mold interconnect are shown herein. Examples of the electronic package include a package...
2018/0277457 SHIELDED MODULE
A module 1a includes a multilayer wiring board 2, a component 3 that is mounted on a main surface 2a of the multilayer wiring board 2, a sealing-resin layer 4...
2018/0277456 SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE
To divide a semiconductor wafer by stealth dicing, a test pad in a cutting region and an alignment target are collectively arranged along one side in a width...
2018/0277455 METHOD FOR OPTIMIZING DRY ABSORBER EFFICIENCY AND LIFETIME IN EPITAXIAL APPLICATIONS
Increasing efficiency of absorbers is provided herein. In some embodiments, a method of processing a substrate may include determining a quantity of a removal...
2018/0277453 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
Semiconductor layer 110 is formed on semiconductor substrate 101. Semiconductor layer 110 has a plurality of well regions 103 in a surface remote from...
2018/0277452 INSPECTION OF SUBSTRATES
Concepts presented herein relate to approaches for performing substrate inspection. In one aspect, the concepts relate to detecting anomalies or candidate...
2018/0277451 MANUFACTURING SYSTEM FOR SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND CONTROL DEVICE
According to an embodiment, a manufacturing system for a semiconductor device includes a first processing device and a second processing device, a measurement...
2018/0277450 MANUFACTURING METHOD AND EVALUATION METHOD OF SILICON EPITAXIAL WAFER
A manufacturing method of a silicon epitaxial wafer having an epitaxial layer grown on a mirror wafer of silicon, including: using a PL measuring apparatus to...
2018/0277449 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, INSPECTION DEVICE OF SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
A subject matter of this invention is that a manufacturing yield of a semiconductor device is improved. A resistance value between a pogo pin and a test pin is...
2018/0277448 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes at least one n-channel, at least one p-channel, at least one first high-k dielectric sheath, at least one second high-k...
2018/0277447 METHOD FOR MANUFACTURING CMOS STRUCTURE
The present disclosure relates to a method for manufacturing a CMOS structure. A first gate stack is formed on a semiconductor substrate in a first region. A...
2018/0277446 VERTICAL TRANSISTOR TOP EPITAXY SOURCE/DRAIN AND CONTACT STRUCTURE
An nFET vertical transistor is provided in which a p-doped top source/drain structure is formed in contact with an n-doped semiconductor region that is present...
2018/0277445 VERTICAL TRANSISTOR TOP EPITAXY SOURCE/DRAIN AND CONTACT STRUCTURE
An nFET vertical transistor is provided in which a p-doped top source/drain structure is formed in contact with an n-doped semiconductor region that is present...
2018/0277444 VARIABLE GATE LENGTHS FOR VERTICAL TRANSISTORS
The method includes prior to depositing a gate on a first vertical FET on a semiconductor substrate, depositing a first layer on the first vertical FET on the...
2018/0277443 VERTICAL FIELD EFFECT TRANSISTORS
Vertical field effect transistors (FETs) with minimum pitch and methods of manufacture are disclosed. The structure includes at least one vertical fin...
2018/0277442 STACKED VERTICAL DEVICES
A semiconductor structure containing a plurality of stacked vertical field effect transistor (FETs) is provided. After forming a first vertical FET of a first...
2018/0277441 METHOD TO IMPROVE CMOS DEVICE PERFORMANCE
A method for manufacturing a semiconductor device includes providing a substrate including a first device region and a second device region spaced apart from...
2018/0277440 GATE CUT METHOD
A method of manufacturing a FinFET structure involves forming gate cuts within a sacrificial gate layer prior to patterning and etching the sacrificial gate...
2018/0277439 METHOD TO FORM HYBRID SIGE FIN
A method for manufacturing a semiconductor device includes providing a semiconductor structure having a semiconductor substrate, a dielectric layer on the...
2018/0277438 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
An object of the present invention is to provide a semiconductor device and a manufacturing method thereof that may achieve low power consumption in a digital...
2018/0277437 SEMICONDUCTOR DEVICE
A main semiconductor element and a temperature sensing part are arranged on a single silicon carbide base. The main semiconductor element is a vertical MOSFET...
2018/0277436 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
According to an embodiment, a method of manufacturing a semiconductor device includes forming a first modified zone in a wafer by irradiating the wafer with a...
2018/0277435 DICING METHOD AND LASER PROCESSING APPARATUS
According to one embodiment, a dicing method is provided. The dicing method includes detecting a first distance between a first portion of a substrate and a...
2018/0277434 PROCESS OF FORMING OHMIC ELECTRODE ON NITRIDE SEMICONDUCTOR MATERIAL
A process of forming an ohmic electrode containing aluminum (Al) on a nitride semiconductor material is disclosed. The process includes steps of: (a)...
2018/0277433 REFLOW INTERCONNECT USING Ru
A method for forming conductive structures for a semiconductor device includes depositing a reflow liner on walls of trenches formed in a dielectric layer and...
2018/0277432 REFLOW INTERCONNECT USING Ru
A method for forming conductive structures for a semiconductor device includes depositing a reflow liner on walls of trenches formed in a dielectric layer and...
2018/0277431 FEATURE FILL WITH NUCLEATION INHIBITION
Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some...
2018/0277430 METHODS OF FORMING AN AIR GAP ADJACENT A GATE OF A TRANSISTOR AND A GATE CONTACT ABOVE THE ACTIVE REGION OF THE...
One method includes performing an etching process to define a gate cavity that exposes an upper surface and at least a portion of the sidewalls of a gate...
2018/0277429 SEMICONDUCTOR DEVICE AND FORMATION THEREOF
A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate, the metal...
2018/0277428 Doping Control of Metal Nitride Films
Described are methods for controlling the doping of metal nitride films such as TaN, TiN and MnN. The temperature during deposition of the metal nitride film...
2018/0277427 STRUCTURE AND METHOD FOR CAPPING COBALT CONTACTS
A process for forming a conductive structure includes the formation of a self-aligned silicide cap over a cobalt-based contact. The silicide cap is formed in...
2018/0277426 METHODS OF FORMING CONDUCTIVE STRUCTURES
One illustrative method disclosed herein includes, among other things, forming a first trench/via and a wider second trench/via in a layer of insulating...
2018/0277425 Power Semiconductor Package Having a Parallel Plate Waveguide
A power semiconductor package includes a first group of semiconductor dies attached to a first side of a substrate and evenly distributed over a width of the...
2018/0277424 SEMICONDUCTOR STRUCTURE WITH INTEGRATED PASSIVE STRUCTURES
A metal-oxide-semiconductor field-effect transistor (MOSFET) with integrated passive structures and methods of manufacturing the same is disclosed. The method...
2018/0277423 SYSTEMS AND METHODS FOR PERFORMING EPITAXIAL SMOOTHING PROCESSES ON SEMICONDUCTOR STRUCTURES
Systems and methods for processing semiconductor structures are provided. The methods generally include determining a desired removal map profile for a device...
2018/0277422 BONDED WAFER PRODUCTION METHOD AND BONDED WAFER
A bonded wafer production method for producing a bonded wafer having a thin film on a base wafer by forming an ion implanted layer in a bond wafer by...
2018/0277421 METHOD OF MANUFACTURING HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULATOR WAFERS WITH CHARGE TRAPPING LAYERS
A method of preparing a single crystal semiconductor handle wafer in the manufacture of a semiconductor-on-insulator device is provided. The single crystal...
2018/0277420 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench...
2018/0277419 SENSOR ARRAY WITH ANTI-DIFFUSION REGION(S) TO EXTEND SHELF LIFE
The inventive concepts disclosed herein are generally directed to a sensor array device that has a prolonged shelf life but requires only a minimal amount of...
2018/0277418 WAFER HOLDING DEVICE AND WAFER CHUCKING AND DECHUCKING METHOD
A wafer holding device includes a wafer chuck that includes a wafer holding surface coming into contact with a wafer to be held and a plurality of attraction...
2018/0277417 SUBSTRATE HOLDING/ROTATING DEVICE, SUBSTRATE PROCESSING APPARATUS INCLUDING THE SAME, AND SUBSTRATE PROCESSING...
The substrate holding/rotating device includes a plurality of movable pins each having a support portion in contact with a peripheral edge portion of the...
2018/0277416 SUBSTRATE PROCESSING APPARATUS
A substrate processing apparatus includes a process chamber, a stage that is disposed in the process chamber and on which a substrate is placeable, a moving...
2018/0277415 SEMICONDUCTOR DEVICE, MAKING METHOD, AND LAMINATE
A semiconductor device is provided comprising a support, an adhesive resin layer, an insulating layer, a redistribution layer, a chip layer, and a mold resin...
2018/0277414 BEARING SUBSTRATE, FABRICATION METHOD FOR FLEXIBLE DISPLAY
Embodiments of the disclosure provide a bearing substrate and a fabrication method for a flexible display device, which relate to the field of display...
2018/0277413 METHOD OF TRANSFER PRINTING AND ARTICLES MANUFACTURED THEREFROM
Disclosed herein is a method comprising disposing on a first substrate a two-dimensional exfoliatable material; patterning an exfoliatable material using a...
2018/0277412 ELECTROSTATIC CHUCK ASSEMBLY INCORPORATING A GASKET FOR DISTRIBUTING RF POWER TO A CERAMIC EMBEDDED ELECTRODE
An electrostatic chuck assembly for processing a semiconductor substrate is provided. The electrostatic chuck assembly includes a first layer, a baseplate, a...
2018/0277411 SUBSTRATE PROCESSING APPARATUS
The present disclosure relates to a substrate processing apparatus, and more particularly, to a substrate processing apparatus capable of blocking particles...
2018/0277410 FUME-REMOVING DEVICE
The present invention relates to an apparatus for removing fume which includes, a wafer cassette for stacking wafers; and an exhaust for exhausting the fume of...
2018/0277409 SUBSTRATE CONTAINER WITH IMPROVED SUBSTRATE RETAINER AND DOOR LATCH ASSIST MECHANISM
A substrate container with a substrate retainer mounted to a biased actuation linkage, and a door assembly with latch assist. Various configurations for...
2018/0277408 A METHOD AND APPARATUS FOR PICKING COMPONENTS FROM A CARRIER
According to the present invention there is provided a method of handling components on a carrier, the method comprising the steps of, providing a carrier...
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