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Patent # Description
2018/0286800 POWER DISTRIBUTION NETWORKS FOR A THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT (IC) (3DIC)
Power distribution networks in a three-dimensional (3D) integrated circuit (IC) (3DIC) are disclosed. In one aspect, a voltage drop within a power distribution...
2018/0286799 MICROELECTRONIC PACKAGE HAVING A PASSIVE MICROELECTRONIC DEVICE DISPOSED WITHIN A PACKAGE BODY
A microelectronic package including a passive microelectronic device disposed within a package body, wherein the package body is the portion of the...
2018/0286798 POWER MESH-ON-DIE TRACE BUMPING
A power mesh-on-die apparatus includes a solder trace that enhances current flow for a power source trace between adjacent power bumps. The solder trace is...
2018/0286797 INTEGRATED CIRCUIT PACKAGE WITH MICROSTRIP ROUTING AND AN EXTERNAL GROUND PLANE
Described herein are integrated circuit structures having a package substrate with microstrip transmission lines as the top metallization layer, and a ground...
2018/0286796 ELECTRONIC COMPONENT MODULE AND METHOD OF MANUFACTURING THE SAME
An electronic component module includes: a substrate including a conductive pattern; an electronic component provided to the substrate; a sealing portion...
2018/0286795 METHOD OF FORMING VIAS USING SILICON ON INSULATOR SUBSTRATE
Apparatuses and methods using a silicon on insulator (SOI) substrate are described. An example apparatus includes: a substrate including a first surface and a...
2018/0286794 INTERPOSER SUBSTRATE AND METHOD OF FABRICATING THE SAME
The invention provides an interposer substrate and a method of fabricating the same. The method includes: etching a carrier to form a recessed groove thereon;...
2018/0286793 PACKAGE STRUCTURE AND METHOD OF FORMING THEREOF
A package structure includes a semiconductor device, a first redistribution line, a dielectric layer, a first conductive bump and a first sealing structure....
2018/0286792 POWER APPARATUS
Various aspects of the disclosure are directed to circuitry coupled for controlling current flow, such as in a cascode arrangement. As may be consistent with...
2018/0286791 ELECTRONIC COMPONENT MODULE AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT MODULE
An electronic component module includes: a first lead frame including a mounting portion on which a chip is mounted, a relay portion connected to an electrode...
2018/0286790 FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes: a first connection member having a through-hole and having a passive component disposed in the first connection...
2018/0286789 LEADFRAME PACKAGE WITH SIDE SOLDER BALL CONTACT AND METHOD OF MANUFACTURING
The present disclosure is directed to a leadframe package having a side solder ball contact and methods of manufacturing the same. A plurality of solder balls...
2018/0286788 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes a base plate to which a stacked substrate is bonded, the stacked substrate being mounted on a semiconductor chip. The...
2018/0286787 METHOD OF PACKAGING A SEMICONDUCTOR DIE
A method of packaging a semiconductor die includes connecting an interposer frame directly to a substrate, wherein the interposer frame has a plurality of...
2018/0286786 SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS
Provided is a semiconductor device enabling highly accurate adjustment of a mounting height at a time when the semiconductor device is mounted on an assembly...
2018/0286785 3D-MICROSTRIP BRANCHLINE COUPLER
The disclosure is directed to semiconductor structures and, more particularly, to a three dimensional microstrip branchline coupler and methods of manufacture....
2018/0286784 METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING A DUAL MATERIAL REDISTRIBUTION LINE
A method of making a semiconductor device includes plating a first conductive material over a first passivation layer, wherein the first conductive material...
2018/0286783 METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposite the first surface, a through via extending...
2018/0286782 METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
A method of producing a semiconductor device includes forming, on a semiconductor substrate comprising a first surface on which an insulating layer covering a...
2018/0286781 POWER MODULE APPARATUS, COOLING STRUCTURE, AND ELECTRIC VEHICLE OR HYBRID ELECTRIC VEHICLE
A power module apparatus (10) comprises: a power module (100A) comprising a package (110) configured to seal a perimeter of a semiconductor device, and a heat...
2018/0286780 INTEGRATED ANTENNA FOR DIRECT CHIP ATTACH CONNECTIVITY MODULE PACKAGE STRUCTURES
Methods of forming microelectronic package structures, and structures formed thereby, are described. Those methods/structures may include a die disposed on a...
2018/0286779 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A space having a certain thickness is provided between a metal base and a heat-dissipation fin set or the like. A semiconductor device is provided, including:...
2018/0286778 Heat Transfer Plate Having Small Cavities For Taking Up A Thermal Transfer Material
A power semiconductor device module includes, among other parts, a DMB structure. The DMB structure includes a ceramic sheet, a top metal plate that is...
2018/0286777 WIRING BOARD, ELECTRONIC DEVICE, AND ELECTRONIC MODULE
The wiring board includes an insulating substrate having a main surface, an external electrode on the main surface and an outer edge portion of the insulating...
2018/0286776 PACKAGE STRUCTURE AND METHOD OF FORMING PACKAGE STRUCTURE
A package structure includes a semiconductor device, a first molding compound, a through-via, a first dielectric layer, a first redistribution line, and a...
2018/0286775 SEMICONDUCTOR MODULE
A semiconductor module includes a metal substrate having a mounting surface, a first conductive plate on the mounting surface, an insulating substrate on the...
2018/0286774 SEMICONDUCTOR DEVICE AND POWER CONVERTER
A semiconductor device includes: at least one power semiconductor element; a sealing resin disposed so as to seal the power semiconductor element; and a...
2018/0286772 VACUUM SUCTION PAD AND SUBSTRATE HOLDER
A vacuum suction pad capable of making it more difficult to separate a substrate when the substrate is held by vacuum suction, the vacuum suction pad 8...
2018/0286771 SEMICONDUCTOR MODULE
Provided is a semiconductor module in which a case and a base plate joined together with a simple structure, the semiconductor module having high insulation...
2018/0286770 BOARD FOR ELECTRONIC COMPONENT PACKAGE, ELECTRONIC COMPONENT PACKAGE, AND METHOD OF MANUFACTURING BOARD FOR...
Aboard for an electronic component package includes a wiring part on which an electronic component is disposed, wherein the wiring part includes an insulating...
2018/0286769 STRESS MINITORING DEVICE AND METHOD OF MANUFACTURING THE SAME
A stress monitoring device includes an anchor structure, a freestanding structure and a Vernier structure. The anchor structure is over a substrate. The...
2018/0286768 METHODS FOR OPTICAL ENDPOINT DETECTION USING AN ENDPOINT BOOSTER
Plasma etching a semiconductor wafer in a vacuum etch chamber includes transmitting an optical signal through an aperture in an endpoint booster that is...
2018/0286767 SUBSTRATE PROCESSING SYSTEM, CONTROL DEVICE, AND FILM DEPOSITION METHOD AND PROGRAM
Disclosed is a substrate processing system that performs a film deposition on plural substrates in a processing container using a film deposition condition...
2018/0286766 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND INSPECTION APPARATUS FOR SEMICONDUCTOR...
In a wafer inspection step for testing electrical characteristics of an integrated circuit in a chip region (CP) formed in a wafer, a first probe needle having...
2018/0286765 METHOD FOR MEASURING CHARGE ACCUMULATION IN FABRICATION PROCESS OF SEMICONDUCTOR DEVICE AND METHOD FOR...
A method for measuring charge accumulation in a fabrication process of a semiconductor device includes at least the following steps. First, a substrate having...
2018/0286764 FIELD EFFECT TRANSISTOR WITH STACKED NANOWIRE-LIKE CHANNELS AND METHODS OF MANUFACTURING THE SAME
A field effect transistor includes a fin having a stack of nanowire-like channel regions including at least first and a second nanowire-like channel regions,...
2018/0286763 METHOD FOR FABRICATING A ROW OF MOS TRANSISTORS
A strip made of a semiconductor material is formed over a substrate. Longitudinal portions of the strip having a same length are covered with sacrificial gates...
2018/0286762 Integration of Semiconductor Structures
At least one embodiment relates to a method for integrating Si.sub.1-xGe.sub.x structures with Si.sub.1-x'Ge.sub.x' structures in a semiconductor device. The...
2018/0286761 FABRICATING FIN-BASED SPLIT-GATE HIGH-DRAIN-VOLTAGE TRANSISTOR BY WORK FUNCTION TUNING
A method is presented for creating an asymmetrical split-gate structure. The method includes forming a first device, forming a second device, forming a first...
2018/0286760 FABRICATING FIN-BASED SPLIT-GATE HIGH-DRAIN-VOLTAGE TRANSISTOR BY WORK FUNCTION TUNING
A method is presented for creating an asymmetrical split-gate structure. The method includes forming a first device, forming a second device, forming a first...
2018/0286759 Asymmetric Source/Drain Epitaxy
A method includes forming a plurality of fins on a substrate and a dummy gate structure over the fins. A spacer layer is formed over the dummy gate structure...
2018/0286758 METHOD OF PROCESSING WORKPIECE
A method of processing a plate-shaped workpiece that includes layered bodies containing metal which are formed in superposed relation to projected dicing lines...
2018/0286757 METHOD OF PROCESSING WORKPIECE
A method of processing a plate-shaped workpiece that includes layered bodies containing metal which are formed in superposed relation to projected dicing...
2018/0286756 WORKPIECE PROCESSING METHOD
A processing method for processing a plate-shaped workpiece having a division line on the front side and a multilayer member containing metal on the division...
2018/0286755 METHOD OF PROCESSING WORKPIECE
A method of processing a plate-shaped workpiece that includes on a face side thereof layered bodies containing metal which are formed in superposed relation to...
2018/0286754 WORKPIECE PROCESSING METHOD
A processing method for processing a plate-shaped workpiece having a division line on the front side and a multilayer member containing metal formed on the...
2018/0286753 METHOD OF PROCESSING WORKPIECE
A method of processing a plate-shaped workpiece that includes layered bodies containing metal which are formed in superposed relation to projected dicing...
2018/0286752 MANUFACTURING METHOD FOR SOLID-STATE IMAGING DEVICE AND SOLID-STATE IMAGING DEVICE
A method for manufacturing a solid-state imaging device comprises a first step of preparing an imaging element having a second principal surface having an...
2018/0286751 TECHNOLOGICAL METHOD FOR PREVENTING, BY MEANS OF BURIED ETCH STOP LAYERS, THE CREATION OF VERTICAL/LATERAL...
Method for producing a semiconductor device by providing a silicon wafer having a plurality of equal height raised portions on a first surface thereof;...
2018/0286750 FORMING SELF-ALIGNED VIAS AND AIR-GAPS IN SEMICONDUCTOR FABRICATION
A semiconductor device includes a first trench on a mandrel line through a top mask layer and stopping at a middle mask layer; and a second trench on a...
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