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Patent # Description
2018/0300287 INFORMATION PROCESSING DEVICE AND CONTROL METHOD THEREFOR
An information processing apparatus manufactured at low cost and with ease and that is capable of making a search for a ground state of an arbitrary Ising...
2018/0300286 SYSTEMS AND METHODS FOR IMPROVING THE PERFORMANCE OF A QUANTUM PROCESSOR VIA REDUCED READOUTS
Techniques for improving the performance of a quantum processor are described. The techniques include reading out a fraction of the qubits in a quantum...
2018/0300285 CLOUD PROGRAMMING SENSOR INTERFACE ARCHITECTURE
An integrated circuit for interfacing with one or more sensors including a wireless interface configured to connect to a network, an I/O interface configured...
2018/0300283 MULTI-HOST PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) SWITCHING
Described herein are enhancements for managing multi-host Peripheral Component Interconnect Express (PCIe) switching. In one implementation, a system includes...
2018/0300282 USB Link Bridge
A universal serial bus (USB) link bridge device is disclosed. The USB link bridge device includes a host side module configured to be interfaced with a USB...
2018/0300281 Apparatus, a Device, and a Method for Addressing a Device by the Apparatus
The invention relates to an apparatus, a device and a method. The apparatus is configured for providing an address to a device attachable with the apparatus....
2018/0300280 ACCELERATOR CONTROL APPARATUS, ACCELERATOR CONTROL METHOD, AND STORAGE MEDIUM
Provided is an accelerator control apparatus including: an accelerator that is configured to store at least one segment data item of a plurality of segment...
2018/0300279 Bus Coupling Unit And Bus System Having A Bus Coupling Unit
The teachings of the present disclosure relate to bus systems. Various embodiments thereof may include bus coupling units, for example a bus coupler...
2018/0300278 Array Processor Having a Segmented Bus System
An array processor on integrated circuit chip. The array processor has a plurality of memories and a segmented bus system, wherein each segment is selectively...
2018/0300277 System and Method for Extended Peripheral Component Interconnect Express Fabrics
An exemplary embodiment extended peripheral component interconnect express (PCIe) device includes a host PCIe fabric comprising a host root complex. The host...
2018/0300276 System and Method for Extended Peripheral Component Interconnect Express Fabrics
An exemplary embodiment extended peripheral component interconnect express (PCIe) device includes a host PCIe fabric comprising a host root complex. The host...
2018/0300275 MULTICHIP PACKAGE LINK
Physical layer logic is provided that is to receive data on one or more data lanes of a physical link, receive a valid signal on another of the lanes of the...
2018/0300274 DETECTING ORIENTATION OF A DEVICE DOCKED TO A DOCKING STATION
Examples disclosed herein provide for the detection of an orientation of a device docked to a docking station for the device. Based on the orientation, the...
2018/0300273 System and Method for Arbitration and Recovery of SPD Interfaces in an Information Handling System
An information handling system includes a DIMM including a SPD and a slave I2C interface, a processor complex including a first master I2C interface...
2018/0300272 WAFER-LEVEL PACKAGE HAVING ONE DIE WITH ITS CLOCK SOURCE SHARED BY MULTIPLE DIES AND ASSOCIATED CLOCK...
A wafer-level package includes a first die and a second die that are wafer-level packaged. The first die has a first clock source. The second die has a second...
2018/0300271 ELECTRONIC SYSTEMS HAVING SERIAL SYSTEM BUS INTERFACES AND DIRECT MEMORY ACCESS CONTROLLERS AND METHODS OF...
An electronic system includes a serial system bus interface having a root complex and an end point, a command bus and a data bus coupled to the serial system...
2018/0300270 INTERRUPTION FACILITY FOR ADJUNCT PROCESSOR QUEUES
Interruption facility for adjunct processor queues. In response to a queue transitioning from a no replies pending state to a reply pending state, an...
2018/0300269 CONFIGURABLE PROCESSOR INTERRUPTS FOR ALLOWING AN APPLICATION TO INDEPENDENTLY HANDLE INTERRUPTS
Embodiments relate to configurable processor interrupts. An aspect includes sending, by an application to supervisor software in a computer system, a request,...
2018/0300268 CACHE SYSTEM AND ASSOCIATED METHOD
Embodiments of the present disclosure provide a cache system and associated method. The cache system includes a first pipeline module including a first...
2018/0300267 MEMORY MODULE WITH DATA BUFFERING
A memory module operable to communicate data with a memory controller via a data bus comprises a plurality of memory integrated circuits including first memory...
2018/0300266 BIT REORDERING FOR MEMORY DEVICES
The present disclosure discloses a memory device including a controller for bit reordering. The controller receives an input bit sequence including a plurality...
2018/0300265 RESILIENT VERTICAL STACKED CHIP NETWORK
Systems, apparatuses, and methods for routing traffic through vertically stacked memory are disclosed. A computing system includes a host processor die and...
2018/0300264 FUNCTION STATES OF A DEVICE COUPLED TO A COMPUTER BUS
Embodiments may include systems and methods for managing a function state of a device when the device is coupled to a processor through a computer bus. An...
2018/0300263 INTERFACE FROM NULL CONVENTION LOGIC TO SYNCHRONOUS MEMORY
Self-timed processing systems and methods of operating self-timed processing systems are disclosed. A self-timed processing system includes an asynchronous...
2018/0300262 HIGH-PERFORMANCE WIRELESS SIDE CHANNEL
A method of controlling a docking station (15) having a wireless access point (21) having a network address for communicating with a mobile device (11) over a...
2018/0300261 Trusted Computing System With Enhanced Memory
A system that executes private enclave functions in a secure high-performance host processor connected to an enhanced memory unit through a conventional memory...
2018/0300260 Replacement Policies for a Hybrid Hierarchical Cache
A hybrid hierarchical cache is implemented at the same level in the access pipeline, to get the faster access behavior of a smaller cache and, at the same...
2018/0300259 LOCAL DISKS ERASING MECHANISM FOR POOLED PHYSICAL RESOURCES
A network system is directed to the efficient management of computer resources, including removal of unused objects within a network system. The network system...
2018/0300258 ACCESS RANK AWARE CACHE REPLACEMENT POLICY
A method of operating a cache memory comprises receiving a first read or write command including at least a first address referring to first data and a first...
2018/0300257 USING AN ACCESS INCREMENT NUMBER TO CONTROL A DURATION DURING WHICH TRACKS REMAIN IN CACHE
Provided are a computer program product, system, and method for using an access increment number to control a duration during which tracks remain in cache....
2018/0300256 MAINTAINING AGENT INCLUSIVITY WITHIN A DISTRIBUTED MMU
Maintaining agent inclusivity within a distributed memory management unit (MMU) including receiving, from an agent, a translation checkout request comprising...
2018/0300255 MAINTAINING AGENT INCLUSIVITY WITHIN A DISTRIBUTED MMU
Maintaining agent inclusivity within a distributed memory management unit (MMU) including receiving, from an agent, a translation checkout request comprising...
2018/0300254 METHOD AND DEVICE FOR STORAGE MANAGEMENT
Embodiments of the present disclosure provide a method and an apparatus for storage management. For example, there is provided a method comprising: creating a...
2018/0300253 TRANSLATE FURTHER MECHANISM
Systems, apparatuses, and methods for implementing a translate further mechanism are disclosed herein. In one embodiment, a processor detects a hit to a first...
2018/0300252 METHOD, DEVICE AND COMPUTER-READABLE MEDIUM FOR STORAGE MANAGEMENT
Embodiments of the present disclosure relate to a method, a device and a computer readable medium for managing a storage system. The method can determine a...
2018/0300251 AVOID CACHE LOOKUP FOR COLD CACHE
Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially...
2018/0300250 METHOD AND APPARATUS FOR STORING DATA
The present disclosure discloses a method and apparatus for storing data. A specific embodiment of the method includes: judging whether a remaining storage...
2018/0300249 DATA CACHING USING LOCAL AND REMOTE MEMORY
A system and method for retrieving cached data are disclosed herein. The system includes a cache server including a local memory and a table residing on the...
2018/0300248 METHOD AND DEVICE FOR OPTIMIZATION OF DATA CACHING
The embodiments of the present disclosure provide a computer-implemented method. The method includes caching data from a persistent storage device into a...
2018/0300247 MANAGING MEMORY ACCESS REQUESTS WITH PREFETCH FOR STREAMS
Managing memory access requests to a cache system including one or more cache levels that are configured to store cache lines that correspond to memory blocks...
2018/0300246 EXTEND GPU/CPU COHERENCY TO MULTI-GPU CORES
In an example, an apparatus comprises a plurality of processing unit cores, a plurality of cache memory modules associated with the plurality of processing...
2018/0300245 METHOD, DEVICE AND COMPUTER READABLE STORAGE MEDIA FOR MANAGING STORAGE SYSTEM
Embodiments of the present disclosure provide a method for managing a storage system, an apparatus and a computer readable storage medium. The method...
2018/0300244 DYNAMICALLY ADJUSTING THE NUMBER OF FLOWS ALLOWED IN A FLOW TABLE CACHE
Some embodiments provide a physical forwarding element that dynamically adjusts the number of flows allowed in a flow table cache. In adjusting, the physical...
2018/0300243 Lightweight Mechanisms for Selecting Infrequently Executed Methods for Eviction from Code Cache
An infrequently used method is selected for eviction from a code cache repository by accessing a memory management data structure from an operating system,...
2018/0300242 Caching a Block of Data in a Multi-Tenant Cache Storage Device Based on Space Usage Boundary Estimates
Mechanisms are provided for managing caching of data in a multi-tenant cache storage device utilized by a distributed dataset based application. The mechanisms...
2018/0300241 POWER-SAFE DATA MANAGEMENT SYSTEM
Embodiments of the invention include systems and methods for recovering the system status and maintaining drive coherency after an unexpected power loss. In...
2018/0300240 METHOD, APPARATUS AND COMPUTER READABLE MEDIUM FOR BUILDING MUTI-TIER FLASH CACHE BY USING SPARE FLASH DRIVES
Embodiments of the present disclosure provide a method for establishing a multi-tier flash cache using spare drives. In some embodiments, there is provided a...
2018/0300239 COMPUTER DEVICE AND DATA PROTECTION METHOD THEREFORE
A computer device and a data protection method therefore are provided. The computer device includes an embedded controller, a data storage, and a power module....
2018/0300238 ADAPTIVE CACHE SIZING PER WORKLOAD
Briefly, in accordance with one or more embodiments, an apparatus comprises a processor to monitor cache utilization of an application during execution of the...
2018/0300237 METHOD FOR ACCESS TO ALL THE CELLS OF A MEMORY AREA FOR PURPOSES OF WRITING OR READING DATA BLOCKS IN SAID CELLS
A method for access to all cells in a memory area for purposes of writing or reading data blocks in the cells may include, for each access time (Ti with i=0 to...
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