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Patent # Description
2018/0315795 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
Provided are a semiconductor device including a plurality of transistors and a plurality of memory cells. Each of the transistors includes a gate structure and...
2018/0315794 METHODS AND APPARATUS FOR THREE-DIMENSIONAL NONVOLATILE MEMORY
A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate,...
2018/0315793 SYSTEMS AND METHODS FOR TRANSFER OF MICRO-DEVICES
An apparatus for positioning micro-devices on a substrate includes one or more supports to hold a donor substrate and a destination substrate, an adhesive...
2018/0315792 IMAGE SENSOR AND SENSOR DEVICE
An image sensor includes a plurality of pixels arranged in matrix, and each pixel includes a first TFT having a first gate electrode and a second gate...
2018/0315791 IMAGE SENSOR STRUCTURE
An image sensor structure is provided, which includes a substrate, a color filter and an infrared filter. The substrate has a first sensing, region for...
2018/0315790 SEMICONDUCTOR DEVICE HAVING PROTECTION LAYER WRAPPING AROUND CONDUCTIVE STRUCTURE
A semiconductor device having a protection layer wrapping around a conductive structure is provided. The semiconductor device comprises an image sensor device...
2018/0315789 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device which improves the dark current characteristics and transfer efficiency of a back-surface irradiation CMOS image sensor without an...
2018/0315788 IMAGE SENSOR
An image sensor is provided. The image sensor includes a substrate having a first region and a second region adjacent to each other; and a first photoelectric...
2018/0315787 SOLID-STATE IMAGING ELEMENT, SOLID-STATE IMAGING ELEMENT MANUFACTURING METHOD, AND ELECTRONIC APPARATUS
The present technology relates to a solid-state imaging element, a solid-state imaging element manufacturing method, and an electronic apparatus that make it...
2018/0315786 IMAGING DEVICE AND CAMERA SYSTEM
An imaging device includes: a pixel including a photoelectric converter including a pixel electrode, a counter electrode, and a photoelectric conversion fila...
2018/0315785 SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD OF SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS
A solid-state imaging device includes a pixel having a photoelectric conversion element which generates a charge in response to incident light, a first...
2018/0315784 STORAGE ZONE FOR AN IMAGE ARRAY PIXEL
The invention concerns a pixel of an image array comprising one or more charge storage structures (200), each charge storage structure comprising: a first...
2018/0315783 SWITCHES WITH MULTIPLE FIELD-EFFECT TRANSISTORS HAVING PROXIMITY ELECTRODES
Field-effect transistor (FET) devices are described herein that include an insulator layer, a plurality of active field-effect transistors (FETs) formed from...
2018/0315782 METHOD OF MANUFACTURING DISPLAY, DISPLAY, AND LIQUID CRYSTAL TELEVISION
Provided is a method of manufacturing a display, a display, and a liquid crystal television that can improve productivity and make a grain size uniform. A...
2018/0315781 COMPLEMENTARY THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND ARRAY SUBSTRATE
The present disclosure relates to a complementary thin film transistor, a manufacturing method thereof, and an array substrate in the field of semiconductors....
2018/0315780 SEMICONDUCTOR DEVICE, LIGHT-EMITTING DEVICE, AND ELECTRONIC DEVICE
An object is to prevent an operation defect and to reduce an influence of fluctuation in threshold voltage of a field-effect transistor. A field-effect...
2018/0315779 DISPLAY DEVICE
A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a...
2018/0315778 ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE
This disclosure discloses an array substrate and a manufacturing method, and a display device, the array substrate including: a channel layer; a gate...
2018/0315777 OXIDE SEMICONDUCTOR MATERIAL, THIN-FILM TRANSISTOR, AND FABRICATION METHOD THEREOF
A thin-film transistor (TFT) is provided in this disclosure, which comprises Sn-doped ZrO.sub.2. This oxide semiconductor material can be used in a...
2018/0315776 DISPLAY DEVICE AND METHOD FOR MANUFACTURING SAME
A display device includes a first substrate and a flexible circuit board. Data lines, scan lines, thin film transistors, gate contacts, and source contacts are...
2018/0315775 ARRAY SUBSTRATE AND METHOD FOR FABRICATING THE SAME, DISPLAY DEVICE
An array substrate, a method for fabricating the same, and a display device are disclosed. The array substrate includes a substrate and a plurality of pixel...
2018/0315774 ARRAY SUBSTRATE AND DISPLAY APPARATUS
An embodiment of the present disclosure relates to an array substrate, which comprises data lines and gate lines arranged on the array substrate having a pixel...
2018/0315773 Cascode Radio Frequency (RF) Power Amplifier On Single Diffusion
An amplifier includes a cascode structure comprising a first transistor having first characteristics coupled to a second transistor having second ...
2018/0315772 THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
A three-dimensional semiconductor memory device includes a substrate including a cell array region and a connection region and an electrode structure including...
2018/0315771 Arrays Of Elevationally-Extending Strings Of Memory Cells And Methods Of Forming Memory Arrays
An array of elevationally-extending strings of memory cells comprises a vertical stack of alternating insulative levels and wordline levels. The wordline...
2018/0315770 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A semiconductor device may include a substrate, an electrode structure including electrodes stacked on the substrate, an upper semiconductor pattern...
2018/0315769 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A three-dimensional semiconductor device includes: A peripheral circuit, distributed on a substrate; a plurality of memory cells above the peripheral circuit,...
2018/0315768 SEMICONDUCTOR DEVICE
To downsize a semiconductor device that includes a non-volatile memory and a capacitive element on a semiconductor substrate. In a capacitive element region of...
2018/0315767 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF MANUFACTURING THE SAME
A semiconductor device including a memory cell featuring a first gate insulating film over a semiconductor substrate, a control gate electrode over the first...
2018/0315766 SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION
Some embodiments include a semiconductor device having a stack structure including a source comprising polysilicon, an etch stop of oxide on the source, a...
2018/0315765 Integrated Circuit and Manufacturing Method Thereof
An integrated circuit includes a substrate, a first isolation feature, and a plurality of memory cells. The substrate has a cell region, a peripheral region,...
2018/0315764 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a non-volatile memory. The non-volatile memory includes a first dielectric layer disposed on a substrate, a floating gate...
2018/0315763 METHOD OF FORMING STATIC RANDOM-ACCESS MEMORY (SRAM) CELL ARRAY
A static random-access memory (SRAM) cell array forming method includes the following steps. A plurality of fin structures are formed on a substrate, wherein...
2018/0315762 SEMICONDUCTOR DEVICES
Disclosed is a semiconductor device including a first active pattern and a second active pattern that extend in a first direction on a substrate and are spaced...
2018/0315761 LASER SPIKE ANNEALING FOR SOLID PHASE EPITAXY AND LOW CONTACT RESISTANCE IN AN SRAM WITH A SHARED PFET AND NFET...
Embodiments are directed to a method of forming a semiconductor device and resulting structures having a shared SRAM trench and a common contact having a low...
2018/0315760 SEMICONDUCTOR ARRANGEMENT WITH CAPACITOR
A semiconductor arrangement includes a logic region and a memory region. The memory region has an active region that includes a semiconductor device. The...
2018/0315759 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating semiconductor device includes the steps of: providing a material layer having a contact pad therein; forming a dielectric layer on the...
2018/0315758 SUBSTRATE PROCESSING METHOD AND DEVICE MANUFACTURED USING THE SAME
A substrate processing method includes stacking a plurality of stack structures each including an insulating layer and a sacrificial layer, on one another. The...
2018/0315757 FIN-BASED III-V/SI OR GE CMOS SAGE INTEGRATION
Embodiments of the invention include a semiconductor structure and a method of making such a structure. In one embodiment, the semiconductor structure...
2018/0315756 VERTICAL TRANSPORT TRANSISTORS WITH EQUAL GATE STACK THICKNESSES
Methods of forming semiconductor devices include forming vertical semiconductor channels on a bottom source/drain layer in a first-type region and a...
2018/0315755 VERTICAL TRANSPORT TRANSISTORS WITH EQUAL GATE STACK THICKNESSES
Semiconductor devices and methods of forming the same include forming vertical semiconductor channels on a bottom source/drain layer in a first-type region and...
2018/0315754 SEMICONDUCTOR DEVICE
A substrate is patterned to form trenches and a semiconductor fin between the trenches. Insulators are formed in the trenches and a first dielectric layer is...
2018/0315753 VERY NARROW ASPECT RATIO TRAPPING TRENCH STRUCTURE WITH SMOOTH TRENCH SIDEWALLS
After forming a plurality of semiconductor fins that are separated from one another by trenches on a substrate, the semiconductor fins are fully or partially...
2018/0315752 SEMICONDUCTOR DEVICE AND METHOD
A semiconductor device and method includes: forming a first fin and a second fin on a substrate; forming a dummy gate material over the first fin and the...
2018/0315751 VERTICAL GATE ALL AROUND LIBRARY ARCHITECTURE
A system and method for creating a layout for a vertical gate all around standard cell are described. Metal gate is placed all around two vertical nanowire...
2018/0315749 COMPACT SOURCE BALLAST TRENCH MOSFET AND METHOD OF MANUFACTURING
A trench metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising a substrate of a first conductivity type, a body region of a second...
2018/0315748 ESD PROTECTION OF MEMS FOR RF APPLICATIONS
The present disclosure generally relates to the combination of MEMS intrinsic technology with specifically designed solid state ESD protection circuits in...
2018/0315747 SEMICONDUCTOR DEVICE HAVING BIASING STRUCTURE FOR SELF-ISOLATING BURIED LAYER AND METHOD THEREFOR
A semiconductor device includes a floating buried doped region, a first doped region disposed between the floating buried doped region and a first major...
2018/0315746 POWER MOS DEVICE HAVING AN INTEGRATED CURRENT SENSOR AND MANUFACTURING PROCESS THEREOF
Power MOS device, in which a power MOS transistor has a drain terminal that is coupled to a power supply node, a gate terminal that is coupled to a drive node...
2018/0315745 Semiconductor Device
To solve a problem in that an antenna or a circuit including a thin film transistor is damaged due to discharge of electric charge accumulated in an insulator...
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