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Patent # Description
2018/0331236 GLUE BLEEDING PREVENTION CAP FOR OPTICAL SENSOR PACKAGES
One or more embodiments are directed to system in package (SiP) for optical devices, such as proximity sensing or optical ranging devices. One embodiment is...
2018/0331235 SCHOTTKY DIODE AND MANUFACTURING METHOD THEREOF
A Schottky diode comprises: a semiconductor layer and a three-terminal port located on a side of the semiconductor layer; the three-terminal port comprises a...
2018/0331234 THIN FILM TRANSISTOR ARRAY SUBSTRATE, ORGANIC LIGHT-EMITTING DISPLAY APPARATUS, AND METHOD OF MANUFACTURING THE...
Provided is a thin film transistor including an active layer including a first silicon active layer, a second silicon active layer, and an oxide active layer...
2018/0331233 OXIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
An oxide semiconductor device and a method for manufacturing the same are provided in the present invention. The oxide semiconductor device includes a back...
2018/0331232 STACKED NANOSHEET FIELD-EFFECT TRANSISTOR WITH AIRGAP SPACERS
Structures for a nanosheet field-effect transistor and methods for forming a structure for a nanosheet field-effect transistor. A fin is formed that includes a...
2018/0331231 A FIELD-EFFECT TRANSISTOR AND THE MANUFACTURING METHOD
A field-effect transistor and a manufacturing method thereof are provided. The method includes depositing a first insulating layer on a substrate; forming a...
2018/0331230 SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS
A semiconductor device includes a substrate, a thin film transistor, and an insulating film that is provided between the substrate and the thin film...
2018/0331229 SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
To provide a miniaturized transistor having highly stable electrical characteristics. Furthermore, also in a semiconductor device including the transistor,...
2018/0331228 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE, OR DISPLAY DEVICE INCLUDING THE...
A change in electrical characteristics of a transistor including an oxide semiconductor film is suppressed. The transistor includes a first gate electrode, a first...
2018/0331227 P-CHANNEL OXIDE SEMICONDUCTOR THIN FILM TRANSISTOR
Substrates, assemblies, and techniques for enabling a p-channel oxide semiconductor. For example, some embodiments can include an oxide semiconductor, where...
2018/0331226 GATE-ALL-AROUND FIN DEVICE
A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a...
2018/0331225 Structure and Method for FinFET Device with Asymmetric Contact
The present disclosure provides one embodiment of a method of forming an integrated circuit structure. The method includes forming a shallow trench isolation...
2018/0331224 WIDE BAND GAP TRANSISTORS ON NON-NATIVE SEMICONDUCTOR SUBSTRATES AND METHODS OF MANUFACTURE THEREOF
Techniques are disclosed for forming a GaN transistor on a semiconductor substrate. An insulating layer forms on top of a semiconductor substrate. A trench,...
2018/0331223 METHOD OF FORMING SEMICONDUCTOR DEVICE
A method of forming a semiconductor device is provided. At least one stacked structure is provided on a substrate. A first spacer material layer, a second...
2018/0331222 STRESSORS FOR COMPRESSIVELY STRAINED GAN P-CHANNEL
Techniques are disclosed for increasing the performance of III-N p-channel devices, such as GaN p-channel transistors. Increased performance is obtained by...
2018/0331221 INTEGRATED CIRCUIT CHIP WITH STRAINED NMOS AND PMOS TRANSISTORS
Longitudinal trenches extend between and on either side of first and second side-by-side strips. Transverse trenches extend from one edge to another edge of...
2018/0331219 SEMICONDUCTOR STRUCTURE WITH INVERTED U-SHAPED CAP LAYER
The present invention provides a semiconductor structure, the semiconductor structure comprises a substrate having a dielectric layer disposed thereon, a gate...
2018/0331218 SEMICONDUCTOR DEVICES WITH SHAPED PORTIONS OF ELEVATED SOURCE/DRAIN REGIONS
A method of forming a semiconductor device can be provided by forming an opening that exposes a surface of an elevated source/drain region. The size of the...
2018/0331217 FORMING A COMBINATION OF LONG CHANNEL DEVICES AND VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTORS ON THE SAME...
A method of forming a vertical transport fin field effect transistor and a long-channel field effect transistor on the same substrate, including, forming a...
2018/0331216 SELF ALIGNED TOP EXTENSION FORMATION FOR VERTICAL TRANSISTORS
A method of forming a semiconductor device that includes providing a vertically orientated channel region; and converting a portion of an exposed source/drain...
2018/0331215 VERTICAL TRANSISTOR PASS GATE DEVICE
A semiconductor device including a fin structure present on a supporting substrate to provide a vertically orientated channel region. A first source/drain...
2018/0331214 FORMING STACKED NANOWIRE SEMICONDUCTOR DEVICE
A method of making a vertical transistor device includes forming a front gate and a back gate opposite a major surface of a substrate. The front gate and the...
2018/0331213 VERTICAL FET WITH SELF-ALIGNED SOURCE/DRAIN REGIONS AND GATE LENGTH BASED ON CHANNEL EPITAXIAL GROWTH PROCESS
A fin extends from, and is perpendicular to, a planar surface of a substrate. A self-aligned bottom source/drain conductor is on the substrate adjacent the...
2018/0331212 DOUBLE GATE VERTICAL FINFET SEMICONDUCTOR STRUCTURE
A semiconductor structure includes a substrate and a vertical FinFET disposed over the substrate. The vertical FinFET includes: a bottom source/drain (S/D)...
2018/0331211 HIGH VOLTAGE METAL OXIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A high voltage MOS device includes: a well region with a first conductive type, a body region with a second conductive type, a gate, plural source regions with...
2018/0331210 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device with a simplified structure including an energization control element and reverse coupling protection element, and a manufacturing...
2018/0331209 SILICON CARBIDE SEMICONDUCTOR DEVICE
The current diffusion layer is interposed between the divided portions of the first base region. The second base region is provided adjacent to both sides of...
2018/0331208 HETEROJUNCTION BIPOLAR TRANSISTOR
A collector layer of an HBT includes a high-concentration collector layer and a low-concentration collector layer thereon. The low-concentration collector...
2018/0331207 INTEGRATED CIRCUIT HEAT DISSIPATION USING NANOSTRUCTURES
An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature...
2018/0331206 POLYCRYSTALLINE SILICON THIN FILM TRANSISTOR AND METHOD OF FABRICATING THE SAME, AND DISPLAY APPARATUS
The present application discloses a method of fabricating a polycrystalline silicon thin film transistor, the method including forming an amorphous silicon...
2018/0331205 TFT-CONTAINING BACKPLATE AND METHOD FOR FABRICATING THE SAME
A method for fabricating a TFT-containing backplate is disclosed. The method includes forming a top-gate TFT on a substrate. The top-gate TFT includes a gate...
2018/0331204 Semiconductor Device with Transistor Cells and a Drift Structure and Method of Manufacturing
By using at least one of a processor device and model transistor cells, a set of design parameters for at least one of a transistor cell and a drift structure...
2018/0331203 THRESHOLD ADJUSTMENT FOR QUANTUM DOT ARRAY DEVICES WITH METAL SOURCE AND DRAIN
Incorporation of metallic quantum dots (e.g., silver bromide (AgBr) films) into the source and drain regions of a MOSFET can assist in controlling the...
2018/0331202 VERTICAL TUNNELING FIELD EFFECT TRANSISTOR DEVICE AND FABRICATION METHOD THEREOF
A VTFET device and fabrication method is provided. The method includes: forming a first doped layer on a semiconductor substrate. Vertical nanowires are formed...
2018/0331201 FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING THE SAME
Provided are field effect transistors and methods of fabricating the same. The transistor may include a substrate with an active pattern, the active pattern...
2018/0331200 TFT SUBSTRATE MANUFACTURING METHOD
The present invention provides a TFT substrate manufacturing method, which includes first forming a graphene semiconductor active layer on a metal foil, then...
2018/0331199 METAL GATE STRUCTURE AND METHODS THEREOF
Provided is a metal gate structure and related methods that include forming a first fin and a second fin on a substrate. In various embodiments, the first fin...
2018/0331198 THIN OXIDE ZERO THRESHOLD VOLTAGE (ZVT) TRANSISTOR FABRICATION
A method of manufacturing a thin gate oxide N-type metal-oxide-semiconductor (NMOS) zero threshold voltage (ZVT) field effect transistor (FET) and an NMOS...
2018/0331197 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
While increasing a threshold voltage of a MOSFET configuring a CMOS, electric power saving of elements is achieved by suppressing excessive increase in the...
2018/0331196 FIELD-EFFECT TRANSISTOR, SEMICONDUCTOR MEMORY DISPLAY ELEMENT, IMAGE DISPLAY DEVICE, AND SYSTEM
A field-effect transistor includes a substrate; a source electrode, a drain electrode, and a gate electrode that are formed on the substrate; a semiconductor...
2018/0331195 LOW SCHOTTKY BARRIER CONTACT STRUCTURE FOR GE NMOS
An apparatus including a substrate; a transistor device on the substrate including a channel and a source and a drain disposed between the channel; a source...
2018/0331194 GATE CUT DEVICE FABRICATION WITH EXTENDED HEIGHT GATES
Semiconductor devices include a first dielectric layer formed over a source and drain region. A second dielectric layer is formed over the first dielectric...
2018/0331193 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes an isolation layer, a gate dielectric layer, a...
2018/0331192 A SEMICONDUCTOR DEVICE, MANUFACTURE THEREOF, AND A RADIATION MEASUREMENT METHOD
A semiconductor device, its manufacturing method, and a radiation measurement method are presented, relating to semiconductor techniques. The semiconductor...
2018/0331191 MULTIPLE STACKED FIELD-PLATED GAN TRANSISTOR AND INTERLAYER DIELECTRICS TO IMPROVE BREAKDOWN VOLTAGE AND REDUCE...
Embodiments of the invention include a high voltage transistor with one or more field plates and methods of forming such transistors. According to an...
2018/0331190 NITRIDE SEMICONDUCTOR DEVICE
A nitride semiconductor device includes a second insulating film (22) covering at least a drain electrode (19) and a thermal stress reducer that reduces...
2018/0331189 Electron Carrier Confinement in Gallium Oxide (Ga2O3)
An electronic device is provided including an electrode, a Gallium Oxide (Ga.sub.2O.sub.3) semiconducting layer, and a dielectric layer positioned in physical...
2018/0331188 VANADIUM DIOXIDE HETEROSTRUCTURES HAVING AN ISOSTRUCTURAL METAL-INSULATOR TRANSITION
Heterostructures that include a bilayer composed of epitaxial layers of vanadium dioxide having different rutile-to-monoclinic phase transition temperatures...
2018/0331187 P-DOPING OF GROUP-III-NITRIDE BUFFER LAYER STRUCTURE ON A HETEROSUBSTRATE
An epitaxial group-ill-nitride buffer-layer structure is provided on a heterosubstrate, wherein the buffer-layer structure has at least one stress-management...
2018/0331186 GALLIUM NITRIDE DEVICE FOR HIGH FREQUENCY AND HIGH POWER APPLICATIONS
A semiconductor device includes a layer of a first semiconducting material, where the first semiconducting material is epitaxially grown to have a crystal...
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