Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
2018/0331135 IMAGE SENSORS AND METHODS OF FORMING THE SAME
An image sensor includes a substrate including a plurality of pixel regions and having a trench between the pixel regions, a photoelectric conversion part in...
2018/0331134 PHOTODIODE ARRAY
A photodiode array 1 has a plurality of photodetector channels 10 which are farmed on an n-type substrate 2 having an n-type semiconductor layer 12, with a...
2018/0331133 IMAGE SENSOR WITH A GATED STORAGE NODE LINKED TO TRANSFER GATE
A CMOS imaging system with increased charge storage of pixels yet decreased physical size, kTC noise and active area. A storage node is connected to the...
2018/0331132 THIN FILM TRANSISTOR (TFT) ARRAY SUBSTRATES AND MANUFACTURING METHODS THEREOF
The present disclosure relates to a thin film transistor (TFT) array substrate and a manufacturing method thereof. The manufacturing method includes adopting a...
2018/0331131 METHOD FOR MANUFACTURING THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING ARRAY SUBSTRATE, ARRAY SUBSTRATE AND...
A method for manufacturing thin film transistor, a method for manufacturing array substrate, an array substrate and a display device are provided. The method...
2018/0331130 THIN FILM TRANSISTOR AND PHOTOELECTRIC DEVICE THEREOF
A thin film transistor includes a gate electrode, a semiconductor layer, a gate dielectric layer, a first dielectric layer, a source electrode, and a drain...
2018/0331128 SEMICONDUCTOR DEVICE AND DISPLAY DEVICE
According to one embodiment, a semiconductor device includes a first insulating film, a first semiconductor layer formed of polycrystalline silicon, a second...
2018/0331127 SEMICONDUCTOR DEVICE AND DISPLAY DEVICE
A semiconductor device including a substrate, a first insulating layer above the substrate, a first transistor including a first oxide semiconductor layer...
2018/0331126 ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY APPARATUS HAVING THE SAME, AND FABRICATING METHOD THEREOF
The present a plication discloses an array substrate, a display panel a splay apparatus having the same, and a fabricating method thereof The array substrate...
2018/0331125 DISPLAY PANEL
A display panel including a display region and a non-display region, a plurality of gate lines, a plurality of data lines, a pixel array and a gate on array...
2018/0331124 DISPLAY DEVICE
A display device includes: a substrate including a main display portion, edge portions disposed at edges of the main display portion and including rounded...
2018/0331123 PIXEL ARRAY
A pixel array including a first scan line, a first data line, a first signal line, a first pixel unit, and a second pixel unit is provided. The first pixel...
2018/0331122 ARRAY SUBSTRATE AND WEARABLE DEVICE
An array substrate and a wearable device are provided. The array substrate includes a base substrate. A first surface of the base substrate is provided with a...
2018/0331121 SEMICONDUCTOR CHIP COMPRISING AN IOPAD FOR ELIMINATING ON-BOARD AND DISCRETE COMPONENTS
An embodiment herein provides a semiconductor chip that includes an IOPAD. The IOPAD includes a core-side region. The core-side region includes one or more...
2018/0331120 Elevationally-Extending Strings Of Memory Cells Individually Comprising A Programmable Charge Storage...
A method comprises forming material to be etched over a substrate. An etch mask comprising a silicon nitride-comprising region is formed elevationally over the...
2018/0331119 SEMICONDUCTOR DEVICE
A semiconductor device includes gate electrodes vertically stacked on a substrate, and channel holes passing through the gate electrodes to extend...
2018/0331118 MULTI-LAYER BARRIER FOR CMOS UNDER ARRAY TYPE MEMORY DEVICE AND METHOD OF MAKING THEREOF
A semiconductor structure includes a doped semiconductor material portion, a metal-semiconductor alloy portion contacting the doped semiconductor material...
2018/0331117 MULTILEVEL MEMORY STACK STRUCTURE WITH TAPERED INTER-TIER JOINT REGION AND METHODS OF MAKING THEREOF
A joint level dielectric material layer is formed over a first alternating stack of first insulating layers and first spacer material layers. A first memory...
2018/0331116 SEMICONDUCTOR MEMORY
According to one embodiment, a memory includes: a first gate of a first transistor and a second gate electrode of the second transistor facing the a...
2018/0331115 NON-VOLATILE MEMORY ALLOWING A HIGH INTEGRATION DENSITY
The invention relates to a non-volatile memory that comprises selection transistors. Each selection transistor includes a layer of semiconductor material with...
2018/0331114 PLATE NODE CONFIGURATIONS AND OPERATIONS FOR A MEMORY ARRAY
Methods, systems, and devices for plate node configurations and operations for a memory array are described. A single plate node of a memory array may be...
2018/0331113 SEMICONDUCTOR STRUCTURES, MEMORY CELLS AND DEVICES COMPRISING FERROELECTRIC MATERIALS, SYSTEMS INCLUDING SAME,...
A semiconductor structure includes an electrode, a ferroelectric material adjacent the electrode, the ferroelectric material comprising an oxide of at least...
2018/0331112 SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, a plurality of lower electrodes disposed on the substrate and are repeatedly arranged in a first direction and in...
2018/0331111 SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME
Semiconductor devices are provided. A semiconductor device includes a substrate, and a source/drain region in the substrate. Moreover, the semiconductor device...
2018/0331110 METHODS OF OPERATING A MEMORY DEVICE
A memory device and a method for fabricating the same are provided. The memory device includes a substrate, a first active region, a second active region, a...
2018/0331109 Compact Semiconductor Memory Device Having Reduced Number of Contacts, Methods of Operating and Methods of Making
An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The...
2018/0331108 QUANTUM DEVICE WITH SPIN QUBITS
A quantum device with spin qubits, comprising: a first semiconducting layer comprising a first matrix of data qubits and measurement qubits connected to each...
2018/0331107 Memory Cells and Memory Arrays
Some embodiments include a memory cell having a first transistor supported by a semiconductor base, and having second and third transistors above the first...
2018/0331106 METHOD TO INDUCE STRAIN IN FINFET CHANNELS FROM AN ADJACENT REGION
Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed using two epitaxial layers of different...
2018/0331105 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
A dummy gate electrode layer and a dummy gate mask layer may be formed on a substrate. The dummy gate mask layer may be patterned to form a dummy gate mask so...
2018/0331104 FABRICATION OF FIN FIELD EFFECT TRANSISTOR COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR DEVICES WITH UNIFORM HYBRID...
A method of forming complementary vertical fins and vertical fins with uniform heights, including, forming a trench in a region of a substrate, wherein the...
2018/0331103 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a substrate having an active pattern thereon, a gate electrode intersecting the active pattern, and a spacer on a sidewall of...
2018/0331102 SEMICONDUCTOR INTEGRATED CIRCUIT
A semiconductor integrated circuit includes: a first well region of a first conductivity type; a second well region of a second conductivity type provided in...
2018/0331101 SELF-ALIGNED METAL GATE WITH POLY SILICIDE FOR VERTICAL TRANSPORT FIELD-EFFECT TRANSISTORS
A method of forming a semiconductor structure includes forming an interfacial layer surrounding at least one channel stack, forming a high-k dielectric layer...
2018/0331100 METHODS OF FABRICATING SEMICONDUCTOR DEVICES USING MOS TRANSISTORS WITH NONUNIFORM GATE ELECTRODE STRUCTURES
A semiconductor device includes a substrate and first and second gate electrodes on the substrate. The first gate electrode includes a first gate insulation...
2018/0331099 SELF-HEATING TEST STRUCTURE
A semiconductor device includes a substrate, a semiconductor fin on the substrate, first and second MOS devices on the substrate, and a dummy gate structure on...
2018/0331098 GATE ISOLATION IN NON-PLANAR TRANSISTORS
An embodiment includes an apparatus comprising: first and second semiconductor fins that are parallel to each other; a first gate, on the first fin, including...
2018/0331097 METHODS, APPARATUS AND SYSTEM FOR VERTICAL FINFET DEVICE WITH REDUCED PARASITIC CAPACITANCE
A method, apparatus and system are disclosed herein for a finFET device having an air gap spacer and/or a tapered bottom dielectric spacer for reducing...
2018/0331096 FABRICATION OF FIELD EFFECT TRANSISTORS WITH DIFFERENT THRESHOLD VOLTAGES THROUGH MODIFIED CHANNEL INTERFACES
A method of fabricating a plurality of field effect transistors with different threshold voltages, including forming a cover layer on a channel region in a...
2018/0331095 3D Chip with Shielded Clock Lines
Some embodiments of the invention provide a three-dimensional (3D) circuit that is formed by stacking two or more integrated circuit (IC) dies to at least...
2018/0331094 3D Chip Sharing Data Bus Circuit
Some embodiments of the invention provide a three-dimensional (3D) circuit that is formed by stacking two or more integrated circuit (IC) dies to at least...
2018/0331093 PROTECTION CIRCUIT AND OPERATIONAL METHOD OF THE PROTECTION CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS
A protection circuit includes: a high-side switch connected to a power terminal to which a predetermined power supply voltage VBB is supplied from an onboard...
2018/0331092 SEMICONDUCTOR DEVICE
A semiconductor device according to an embodiment includes: an insulating film formed on a voltage supporting region B; an overvoltage protection diode that...
2018/0331091 DETECTION DEVICE AND METHOD FOR GATE DRIVE CIRCUIT
A detection device for a gate drive circuit and a detection method for the gate drive circuit are disclosed. In a connecting element of the detection device, a...
2018/0331090 ELECTROSTATIC DISCHARGE (ESD) PROTECTION DEVICE AND METHOD FOR OPERATING AN ESD PROTECTION DEVICE
Embodiments of an electrostatic discharge (ESD) protection device and a method of operating an ESD protection device are described. In one embodiment, an ESD...
2018/0331089 PROXIMITY COUPLING INTERCONNECT PACKAGING SYSTEMS AND METHODS
Proximity coupling interconnect packaging systems and methods. A semiconductor package assembly comprises a substrate, a first semiconductor die disposed...
2018/0331088 METHODS AND SYSTEMS FOR PACKAGING SEMICONDUCTOR DEVICES TO IMPROVE YIELD
A method for packaging semiconductor devices in a chamber includes arranging a carrier substrate including a first semiconductor device and a second...
2018/0331087 STACKED SEMICONDUCTOR PACKAGE HAVING MOLD VIAS AND METHOD FOR MANUFACTURING THE SAME
A stacked semiconductor package includes a first semiconductor chip having a first active surface over which first bonding pads including peripheral bonding...
2018/0331086 MICRO-LED ARRAY DISPLAY DEVICES
Micro-LED array display devices are disclosed. One of the micro-LED display devices includes: a micro-LED panel including a plurality of micro-LED pixels; a...
2018/0331085 MICRO-LED ARRAY DISPLAY DEVICES
Micro-LED array display devices are disclosed. One of the micro-LED display devices includes: a micro-LED panel including a plurality of micro-LED pixels; a...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.