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Patent # Description
2018/0329869 DETERMINING APPEARANCES FOR ELEMENTS DISPLAYED ON USER INTERFACE
A device is provided for determining appearances for elements displayed on a user interface. In one implementation, GP the device includes a processing unit...
2018/0329868 Vector and Matrix Computing Device
A computing device and related products are provided. The computing device is configured to perform machine learning calculations. The computing device...
2018/0329867 PROCESSING DEVICE FOR PERFORMING CONVOLUTION OPERATIONS
Systems and methods for performing convolution operations. An example processing system comprises: a processing core; and a convolver unit to apply a...
2018/0329866 SYSTEM, METHOD, AND RECORDING MEDIUM FOR DIFFERENTIATED AND PARTIAL FEATURE UPDATE IN ALTERNATING LEAST SQUARE
An alternating least square recommendation method, system, and non-transitory computer readable medium, include receiving an existing sparse matrix...
2018/0329865 DYNAMIC OUTLIER BIAS REDUCTION SYSTEM AND METHOD
A system and method is described herein for data filtering to reduce functional, and trend line outlier bias. Outliers are removed from the data set through an...
2018/0329864 IMAGE PROCESSOR WITH CONFIGURABLE NUMBER OF ACTIVE CORES AND SUPPORTING INTERNAL NETWORK
A method is described. The method includes configuring a first instance of object code to execute on a processor. The processor has multiple cores and an...
2018/0329863 IMAGE PROCESSOR I/O UNIT
An image processor is described. The image processor includes a storage circuit to store segments of input image data received in a raster scan format from a...
2018/0329862 METHOD AND APPARATUS FOR UPDATING SERVER FIRMWARE IN SERVER, AND SERVER
The present disclosure discloses a method and apparatus for updating server firmware in a server. The server is based on a Purley platform, a South Bridge chip...
2018/0329861 CACHE MANAGEMENT IN RDMA DISTRIBUTED KEY/VALUE STORES BASED ON ATOMIC OPERATIONS
A cache management system performs cache management in a Remote Direct Memory Access (RDMA) key value data store. The cache management system receives a...
2018/0329860 REMOTE DIRECT MEMORY ACCESS (RDMA) HIGH PERFORMANCE PRODUCER-CONSUMER MESSAGE PROCESSING
A method, system and computer program product for remote direct memory access (RDMA) optimized producer-consumer message processing in a messaging hub is...
2018/0329859 Interface with Variable Data Rate
A device includes a transmitter coupled to a node, where the node is to couple to a wired link. The transmitter has a plurality of modes of operation including...
2018/0329858 Methods and System for Providing Software Defined Microcontroller Unit (MCU)
One embodiment of the present invention discloses a configurable microcontroller unit ("CMU") capable of providing one or more programmable input and output...
2018/0329857 HARDWARE EVENT PRIORITY SENSITIVE PROGRAMMABLE TRANSMIT WAIT-WINDOW FOR VIRTUAL GPIO FINITE STATE MACHINE
Systems, apparatus, methods and techniques that can provide optimized low-latency communications between different devices such that GPIO signals may be...
2018/0329856 SLAVE MASTER-WRITE/READ DATAGRAM PAYLOAD EXTENSION
Systems, methods, and apparatus for communicating datagrams over a serial communication link are provided. A transmitting device generates an address field in...
2018/0329855 ALTERNATE PROTOCOL NEGOTIATION IN A HIGH PERFORMANCE INTERCONNECT
A port of a computing device is to communicate with another device over a link, the port including physical layer logic of a first protocol, link layer logic...
2018/0329854 DEVICES, SYSTEMS, AND METHODS OF REDUCING CHIP SELECT
Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a...
2018/0329853 MULTI-CHANNEL DIMMS
A system and method for multi-channel communication with dual in-line memory modules ("DIMMs") is disclosed. The system retrieves information characterizing a...
2018/0329852 SINGLE-CHIP CONTROL MODULE FOR AN INTEGRATED SYSTEM-ON-A-CHIP FOR SILICON PHOTONICS
The present invention provides an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data...
2018/0329851 USB INTERFACE CIRCUIT AND USB DEVICE
The present invention provides a USB interface circuit comprising a USB transceiver and at least two USB controllers of different protocol types; wherein at...
2018/0329850 MEMORY SYSTEM FOR SUPPORTING INTERNAL DQ TERMINATION OF DATA BUFFER
A memory system configured to support internal data (DQ) termination of a data buffer is provided. The memory system includes a first memory module, which is a...
2018/0329849 EXPANDABLE INTERFACE BOARD
The present invention provides an expandable interface board. The interface board is an interface board conforming to M.2 interface protocol specification,...
2018/0329848 ELEVATOR DATA COMMUNICATION ARRANGEMENT
Elevator safety and safety related information needs to be sent reliably to safety controlling systems. Existing elevator communication devices may be used for...
2018/0329847 SELECTABLE PERIPHERAL LOGIC IN PROGRAMMABLE APPARATUS
A programmable apparatus for executing a function is disclosed. The programmable apparatus includes a physical interface configured to be connected with an...
2018/0329846 INTER-DEVICE DIGITAL AUDIO
A method for reconfiguring a bus device from a first configuration into a second configuration, wherein the second configuration is not visible to, and is not...
2018/0329845 UNIVERSAL PERIPHERAL CONNECTOR
A universal connector apparatus for a mobile device and in communication with the mobile device, the apparatus comprising: at least one universal serial bus...
2018/0329844 MULTI-PROTOCOL IO INFRASTRUCTURE FOR A FLEXIBLE STORAGE PLATFORM
A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a...
2018/0329843 TECHNIQUES OF PROVIDING SERIAL PORT IN NON-LEGACY SYSTEM VIA EMBEDDED-SYSTEM DEVICE
In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be an embedded-system device. The...
2018/0329842 METHOD AND APPARATUS FOR PROCESSOR STANDBY
A method of and device for removing a processor from a low power mode. The method includes and the device provides for performing multiple processor start-up...
2018/0329841 MEMORY ACCESS CONTROL DEVICE AND CONTROL METHOD OF MEMORY ACCESS
A memory access control device includes: a memory configured to hold data from a host device; and a processor coupled to the memory, the processor: detects an...
2018/0329840 INFORMATION PROCESSING APPARATUS, STORAGE MEDIUM AND INFORMATION PROCESSING METHOD
An information processing apparatus includes a processor; and a management controller coupled to the processor and configured to prohibit interruption from a...
2018/0329839 ADAPTIVE SCHEDULING OF MEMORY REQUESTS
Apparatuses and method for an integrated circuit device are described. In an apparatus thereof, there is a plurality of memory controllers coupled to a...
2018/0329838 BUS COMMUNICATION ENHANCEMENT BASED ON IDENTIFICATION CAPTURE DURING BUS ARBITRATION
Systems, methods, and apparatus for communicating datagrams over a serial communication link are provided. A receiving device captures a sending device address...
2018/0329837 INPUT/OUTPUT DIRECTION DECODING IN MIXED VGPIO STATE EXCHANGE
Systems, methods, and apparatus for communication virtualized general-purpose input/output (GPIO) signals over a serial communication link. A method performed...
2018/0329836 ELECTRONIC DEVICE CONTROLLER, ELECTRONIC DEVICE CONTROL METHOD, AND ELECTRONIC DEVICE CONTROL PROGRAM
An electronic device controller, in order to link various electronic devices without requiring troublesome installation of applications, drivers, etc., is...
2018/0329835 IMPLEMENTING PER-THREAD MEMORY ACCESS PERMISSIONS
Disclosed are systems and methods of implementing per-thread granular memory access permissions. An example method may include: initializing a plurality of...
2018/0329834 SECURELY STORING RANDOM KEYS IN A DISPERSED STORAGE NETWORK
A method includes segmenting, by a computing device of a dispersed storage network (DSN), a data object into data segments. The method further includes...
2018/0329833 BROWSER SESSION STORAGE AS STORAGE FOR PRIVATE KEY IN PUBLIC-KEY ENCRYPTION SCHEMA
An encryption system, method, and computer software program product provides encrypted transmission of data between a server and a web browser application on a...
2018/0329832 INFORMATION PROCESSING APPARATUS, MEMORY CONTROL CIRCUITRY, AND CONTROL METHOD OF INFORMATION PROCESSING APPARATUS
An information processing apparatus includes a processor, a plurality of memories, and a memory control circuitry coupled to the processor and the plurality of...
2018/0329831 FINE-GRAINED CACHE OPERATIONS ON DATA VOLUMES
A method includes accessing a cache including a first cache block and setting the first cache block to a passive sub-state, where the first cache block in the...
2018/0329830 REDUCING METADATA SIZE IN COMPRESSED MEMORY SYSTEMS OF PROCESSOR-BASED SYSTEMS
Reducing metadata size in compressed memory systems of processor-based systems is disclosed. In one aspect, a compressed memory system provides 2.sup.N...
2018/0329829 TRACKING AND MANAGING TRANSLATION LOOKASIDE BUFFERS
Translation lookaside buffer (TLB) tracking and managing technologies are described. A processing device comprises a translation lookaside buffer (TLB) and a...
2018/0329828 KERNEL-ASSISTED INTER-PROCESS DATA TRANSFER
Inter-process data transfer on a host computing device is disclosed. A kernel module executing on the host computing device receives, from a first process,...
2018/0329827 Flash Memory Devices and Prefetch Methods Thereof
A storage device includes a flash memory array and a controller. The flash memory array stores a plurality of user data. After the controller finishes...
2018/0329826 IMPLEMENTING BARRIERS TO EFFICIENTLY SUPPORT CUMULATIVITY IN A WEAKLY ORDERED MEMORY SYSTEM
A technique for operating a lower level cache memory of a data processing system includes receiving an operation that is associated with a first thread....
2018/0329825 OPTIMIZING THE MANAGEMENT OF CACHE MEMORY
Cache management. It is determined that a cache operation relating to the transfer of data between a cache memory and a data storage system is required. A...
2018/0329824 STORAGE APPARATUS AND CONTROL METHOD THEREOF
Proposed are a storage apparatus and a control method thereof capable of improving the response performance to a read access of various access patterns. When...
2018/0329823 SYSTEM AND METHOD FOR SPATIAL MEMORY STREAMING TRAINING
Apparatuses, systems, methods for a spatial memory streaming (SMS) prefetch engine are described. In one aspect, an SMS prefetch engine uses trigger-to-trigger...
2018/0329822 SPATIAL MEMORY STREAMING CONFIDENCE MECHANISM
Apparatuses and methods of manufacturing same, systems, and methods for a spatial memory streaming (SMS) prefetch engine are described. In one aspect, the SMS...
2018/0329821 INTEGRATED CONFIRMATION QUEUES
According to one general aspect, an apparatus may include a cache pre-fetcher configured to predict data to be retrieved from a memory system. The cache...
2018/0329820 NON-UNIFORM BUS (NUB) INTERCONNECT PROTOCOL FOR TILED LAST LEVEL CACHES
A method and apparatus are provided. The apparatus includes a plurality of central processing units, a plurality of core input/output units, a plurality of...
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