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Patent # Description
2019/0019733 NANOSHEET DEVICES WITH CMOS EPITAXY AND METHOD OF FORMING
This disclosure relates to a method of forming nanosheet devices including: forming a first and second nanosheet stack on a substrate, the first and the second...
2019/0019732 GATE-END STRUCTURE ENGINEERING FOR SEMICONDUCTOR APPLICATIONS
Semiconductor device structures with reduced gate end width formed at gate structures and methods for manufacturing the same are provided. In one example, a...
2019/0019731 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A method for fabricating a semiconductor structure includes forming a plurality of mandrels over a substrate, wherein the substrate comprises a semiconductor...
2019/0019730 EFFECTIVE COMPOUND SUBSTRATE FOR NON-DESTRUCTIVE EPITAXIAL LIFT-OFF
The present disclosure relates to compound substrates for use in epitaxial lift-off. In one implementation, a compound substrate may include a diced wafer...
2019/0019729 METHOD AND DEVICE FOR THE PRODUCTION OF WAFERS WITH A PRE-DEFINED BREAK INITIATION POINT
The present invention relates to a method for the production of layers of solid material, in particular for use as wafers. The method may include the following...
2019/0019728 WAFER SINGULATION PROCESS CONTROL
A method for monitoring and controlling a substrate singulation process is described. Device edges are imaged and identified for analysis. Discrepancies in...
2019/0019727 SEMICONDUCTOR DEVICE WITH GATE STACK
A semiconductor device is provided. The semiconductor device includes a gate stack over a semiconductor substrate and a spacer element over a sidewall of the...
2019/0019726 LINER RECESS FOR FULLY ALIGNED VIA
Devices and methods of fabricating devices are provided. One method includes: obtaining an intermediate semiconductor device having a dielectric layer, an...
2019/0019725 TUNGSTEN FEATURE FILL
Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as...
2019/0019724 CYCLIC CONFORMAL DEPOSITION/ANNEAL/ETCH FOR SI GAPFILL
Methods for seam and void-free gapfilling, such as gapfilling high aspect ratio trenches with amorphous silicon, are provided. A method generally includes...
2019/0019723 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a base, a memory cell region on the base comprising a first plurality of conductive layers and a...
2019/0019722 Integrated Circuitry
Some embodiments include methods in which a structure has a first semiconductor material over a dielectric region, a second semiconductor material under the...
2019/0019721 METHOD OF MANUFACTURE OF A SEMICONDUCTOR ON INSULATOR STRUCTURE
A method is provided for preparing a semiconductor-on-insulator structure comprising a multilayer dielectric layer.
2019/0019720 Methods of Forming Material Within Openings Extending into a Semiconductor Construction, and Semiconductor...
Some embodiments include a construction having a horizontally-extending layer of fluorocarbon material over a semiconductor construction. Some embodiments...
2019/0019719 TRANSPORT APPARATUS AND ADAPTER PENDANT
A semiconductor process transport apparatus including a drive section with at least one motor, an articulated arm coupled to the drive section for driving...
2019/0019718 TRANSFER SUPPORT AND TRANSFER MODULE
A transfer support adapted to contact a plurality of elements is provided. The transfer support has a first surface, a second surface opposite to the first...
2019/0019717 DESIGN FOR A TESSELLATED MAGNETIC STAGE FOR THE PARALLEL ASSEMBLY OF DIAMAGNETIC COMPONENTS
Systems, and methods of use thereof, for assembling a plurality of diamagnetic components. The system including a first stage and a second stage, wherein each...
2019/0019716 HEAT TRANSFER SHEET AND SUBSTRATE PROCESSING APPARATUS
A heat transfer sheet formed of a plurality of layers provided between a mounting stage and a focus ring on an outer side of a substrate to be mounted on the...
2019/0019715 ELECTROSTATIC CHUCK
An electrostatic chuck includes a ceramic dielectric substrate, a base plate, and a heater plate. The heater plate is provided between the ceramic dielectric...
2019/0019714 ELECTROSTATIC CHUCK DEVICE
An electrostatic chuck device includes: an electrostatic chuck part which incorporates an internal electrode for electrostatic attraction and has a placing...
2019/0019713 ELECTROSTATIC CHUCK DEVICE AND METHOD FOR MANUFACTURING ELECTROSTATIC CHUCK DEVICE
An electrostatic chuck device includes: a base having one principal surface which is a placing surface on which a plate-shaped sample is placed, wherein the...
2019/0019712 ELECTROSTATIC CHUCK
Disclosed herein is an electrostatic chuck having a holding surface for holding a wafer with a tape attached to one side of the wafer in the condition where...
2019/0019711 PROBER
Abbe error that needs to be considered in high accuracy positioning of a device to be maintained, is suppressed. A prober includes: a plurality of measurement...
2019/0019710 SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD
A substrate processing apparatus includes a holding unit which holds a substrate horizontally, a facing member which faces an upper surface of the substrate...
2019/0019709 WORKPIECE STOCKER WITH CIRCULAR CONFIGURATION
An improved stocker configuration for storing workpieces in a fabrication facility is disclosed, employing workpiece compartments arranged stationarily around...
2019/0019708 Buffer Chamber Wafer Heating Mechanism And Supporting Robots
Buffer chamber including robots, a carousel and at least one heating module for use with a batch processing chamber are described. Robot configurations for...
2019/0019707 CONVEYANCE SYSTEM
A conveyance system includes a travel rail; and a plurality of vehicles each having a travel part configured to travel on the travel rail in a first direction...
2019/0019706 SUBSTRATE PROCESSING DEVICE
A substrate processing apparatus has an inner region surrounded by an outer wall, and the inner region is divided by a first partition wall into first and...
2019/0019705 SUBSTRATE PROCESSING APPARATUS, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND RECORDING MEDIUM
There is provided a technique includes: a substrate holder including a heat insulating part and a substrate holding part disposed above the heat insulating...
2019/0019704 GLASS SUBSTRATE SHIPPER
A substrate container (100) includes a base (105) and a cover (115). The cover (115) mates with the base (105) to define an enclosure. A stack of interlocking...
2019/0019703 FLEXIBLE SUBSTRATE SHIPPER
A substrate container (100) includes a receptacle (105) and a cover (110). The receptacle (105) includes a base portion (115) for supporting a substrate and a...
2019/0019702 TRANSFER SUPPORT AND TRANSFER MODULE
A transfer support adapted to contact a plurality of elements is provided. The transfer support has a first surface, a second surface opposite to the first...
2019/0019701 SUBSTRATE POSITION ADJUSTMENT METHOD, STORAGE MEDIUM AND SUBSTRATE TREATMENT SYSTEM
The method includes a step of executing a rotation treatment in a rotation treatment apparatus; a step of imaging a substrate on which the rotation treatment...
2019/0019700 METHODS AND SYSTEMS FOR SPIN-COATING MULTI-LAYER THIN FILMS HAVING LIQUID CONSERVATION FEATURES
A system for retaining a spin-coating fluid when forming a thin film includes a rotatable chuck; a substrate on the rotatable chuck, the substrate having an...
2019/0019699 SUBSTRATE PROCESSING APPARATUS AND TEMPERATURE MEASUREMENT UNIT
There is provided a technique capable of easily improving accuracy of temperature measurement of a substrate, regardless of a film formation state of the...
2019/0019698 SUBSTRATE TREATING APPARATUS
A substrate treating apparatus includes a treating section for treating substrates, and an interface section disposed adjacent the treating section and...
2019/0019697 LIGHT IRRADIATION TYPE HEAT TREATMENT APPARATUS
A light diffusion plate made of quartz and provided with a plurality of grooves each having an inclined surface is placed on an upper chamber window so as to...
2019/0019696 APPARATUS FOR PURGING SEMICONDUCTOR PROCESS CHAMBER SLIT VALVE OPENING
A semiconductor processing chamber is provided and may include a wafer transfer passage that extends through a chamber wall and has an inner passage surface...
2019/0019695 ENVIRONMENTALLY CONTROLLED COATING SYSTEMS
Embodiments of an enclosed coating system according to the present teachings can be useful for patterned area coating of substrates in the manufacture of a...
2019/0019694 Wafer Manufacturing Cleaning Apparatus, Process And Method Of Use
A cleaning wafer or substrate for use in cleaning, or in combination with, components of, for example, integrated chip manufacturing apparatus. The cleaning...
2019/0019693 3D SEMICONDUCTOR DEVICE AND STRUCTURE
A 3D semiconductor device, the device including: a first single crystal layer including a plurality of first transistors and a first metal layer, where the...
2019/0019692 METHOD OF MANUFACTURING GLASS INTERPOSER
In a method of manufacturing a glass interposer, first, stacked bodies formed on a front surface and a back surface of a glass substrate are processed along...
2019/0019691 VIA INTERCONNECTS IN SUBSTRATE PACKAGES
Embodiments herein may relate to providing, on a pad coupled with a carrier panel, a sacrificial element. Embodiments may further relate to providing, on the...
2019/0019690 NON-HALOGEN ETCHING OF SILICON-CONTAINING MATERIALS
Processing methods may be performed to limit damage of features of a substrate, such as missing fin damage. The methods may include forming a plasma of an...
2019/0019689 METHOD FOR PROCESSING TARGET OBJECT
In a method according to an embodiment, before etching a target layer of a wafer, a main surface of the target layer is divided into a plurality of areas. A...
2019/0019688 CONTROLLED ETCH OF NITRIDE FEATURES
Methods of etching a semiconductor substrate may include applying an etchant to the semiconductor substrate. The semiconductor substrate may include an exposed...
2019/0019687 METHOD FOR FABRICATING LATERALLY INSULATED INTEGRATED CIRCUIT CHIPS
Laterally insulated integrated circuit chips are fabricated from a semiconductor wafer. Peripheral trenches are formed in the wafer which laterally delimit...
2019/0019686 WAFER ELEMENT WITH AN ADJUSTED PRINT RESOLUTION ASSIST FEATURE
A wafer element fabrication method is provided. The wafer element fabrication method includes forming a device element on a substrate such that the device...
2019/0019685 ETCHING METHOD
The present disclosure relates to an etching method including: a first step of forming an etching assistance layer on a surface of at least one of a plurality...
2019/0019684 METHODS FOR DEPOSITING SEMICONDUCTOR FILMS
A method for forming a film on a substrate in a semiconductor process chamber includes forming a first layer on the substrate using a plasma enhanced process...
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