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Patent # Description
2019/0043819 ELECTRONIC PACKAGE HAVING REDISTRIBUTION STRUCTURE
An electronic package is provided, including an electronic component, a redistribution structure formed on the electronic component, a plurality of conductive...
2019/0043818 Semiconductor chip and method of processing a semiconductor chip
Various embodiments provide a semiconductor chip, wherein the semiconductor chip comprises a first contact area and a second contact area both formed at a...
2019/0043817 LAND GRID BASED MULTI SIZE PAD PACKAGE
The present disclosure provides packages and methods for fabricating packages. A package may comprise a wafer-level package (WLP) layer comprising a WLP...
2019/0043816 HIGH-DENSITY TRIPLE DIAMOND STRIPLINE INTERCONNECTS
In accordance with embodiments disclosed herein, there is provided a high density triple diamond stripline interconnect. An interconnect includes a first...
2019/0043815 Body-Mountable Device with a Common Substrate for Electronics and Battery
An example device includes a silicon substrate having a first substrate surface and a second substrate surface; a plurality of layers associated with one or...
2019/0043814 METHOD FOR DETECTING THINNING OF THE SUBSTRATE OF AN INTEGRATED CIRCUIT FROM ITS BACK SIDE, AND ASSOCIATED...
An integrated electronic circuit includes a semiconductor substrate with a semiconductor well that is isolated by a buried semiconductor region located under...
2019/0043813 SEMICONDUCTOR DEVICE, SEMICONDUCTOR CHIP AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
Provided is a semiconductor device including a semiconductor substrate including a main chip area and a scribe lane area adjacent to the main chip area, the...
2019/0043812 INTERCHIP BACKSIDE CONNECTION
A multi-chip module structure (MCM) having improved heat dissipation includes a plurality of semiconductor chips having a front side mounted on a packaging...
2019/0043811 SIGNAL ISOLATION FOR MODULE WITH BALL GRID ARRAY
Signal isolation for module with ball grid array. In some embodiments, a packaged module can include a packaging substrate having an underside, and an...
2019/0043810 ELECTRONICS PACKAGE INCLUDING INTEGRATED ELECTROMAGNETIC INTERFERENCE SHIELD AND METHOD OF MANUFACTURING THEREOF
An electronics package includes a support substrate, an electrical component having a first surface coupled to a first surface of the support substrate, and an...
2019/0043809 METHODS OF FORMING AN ULTRA-LOW-K DIELECTRIC LAYER AND DIELECTRIC LAYERS FORMED THEREBY
Embodiments of the present inventive concepts provide methods of forming an ultra-low-k dielectric layer and the ultra-low-k dielectric layer formed thereby....
2019/0043808 INTERPOSER FOR AN INTEGRATED SYSTEM AND CORRESPONDING DESIGN METHOD
An interposer for an integrated system comprises a plurality of first connecting members and a plurality of second connecting members to be electrically...
2019/0043807 METAL-NITRIDE-FREE VIA IN STACKED MEMORY
A nonvolatile memory device includes a metal silicon nitride layer on a three-dimensional (3D) crosspoint architecture, where the metal silicon nitride layer...
2019/0043806 METHOD OF MANUFACTURING CHIP PACKAGE STRUCTURE WITH CONDUCTIVE PILLAR
A method of manufacturing a chip package structure comprising: disposing a first semiconductor component on a first carrier, wherein the first semiconductor...
2019/0043804 SEMICONDUCTOR DEVICES
A semiconductor device includes a first conductive element, a first insulating layer and a second insulating layer sequentially disposed on the first...
2019/0043803 SEMICONDUCTOR DEVICE
A semiconductor device is provided. The semiconductor device includes a substrate comprising a lower wire, an etch stop layer on the substrate, an interlayer...
2019/0043802 METHOD OF MANUFACTURING AN ELECTRONICS PACKAGE USING DEVICE-LAST OR DEVICE-ALMOST LAST PLACEMENT
A method of manufacturing a multi-layer electronics package includes attaching a base insulating substrate to a frame having an opening therein and such that...
2019/0043801 SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING THE SAME
A semiconductor structure includes a conductive feature on a substrate. A plurality of first dielectric layers are disposed on the conductive feature, and...
2019/0043800 SEMICONDUCTOR PACKAGE HAVING A VARIABLE REDISTRIBUTION LAYER THICKNESS
Semiconductor packages having variable redistribution layer thicknesses are described. In an example, a semiconductor package includes a redistribution layer...
2019/0043799 PACKAGE STRUCTURE AND FABRICATING METHOD THEREOF
A package structure includes a first carrier plate, a second carrier plate, a pin group and an encapsulant member. A power component is disposed on a first top...
2019/0043798 METHOD FOR FABRICATING ELECTRONIC PACKAGE
An electronic package is provided, which includes: a circuit structure having opposite first and second surfaces; a metal layer formed on the first surface of...
2019/0043797 CAVITY WALL STRUCTURE FOR SEMICONDUCTOR PACKAGING
An improved method for forming a semiconductor package is disclosed herein. The method includes forming a multi-layer package substrate having a first major...
2019/0043796 PACKED INTERCONNECT STRUCTURE WITH REDUCED CROSS COUPLED NOISE
An apparatus is described. The apparatus includes an electro-mechanical interface having angled signal interconnects, wherein, the angling of the signal...
2019/0043795 METHOD FOR FORMING A HOMOGENEOUS BOTTOM ELECTRODE VIA (BEVA) TOP SURFACE FOR MEMORY
Various embodiments of the present application are directed towards an integrated circuit comprising a memory cell on a homogeneous bottom electrode via (BEVA)...
2019/0043794 ELECTRONICS PACKAGE INCLUDING INTEGRATED STRUCTURE WITH BACKSIDE FUNCTIONALITY AND METHOD OF MANUFACTURING THEREOF
An electronics package includes a support substrate, an electrical component having an active surface coupled to a first surface of the support substrate, and...
2019/0043793 SEMICONDUCTOR DEVICE WITH A SEMICONDUCTOR DIE EMBEDDED BETWEEN AN EXTENDED SUBSTRATE AND A BOTTOM SUBSTRATE
A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom...
2019/0043792 SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME
Various embodiments may provide a semiconductor package. The semiconductor package may include a routing layer including a plurality of first layer contact...
2019/0043791 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a semiconductor element, a mount portion, and a sintered metal bond. The semiconductor element includes a body and an electrode...
2019/0043790 MODIFIED LEADFRAME DESIGN WITH ADHESIVE OVERFLOW RECESSES
The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of...
2019/0043789 FLIP CHIP SELF-ALIGNMENT FEATURES FOR SUBSTRATE AND LEADFRAME APPLICATIONS
Methods and system for flip chip alignment for substrate and leadframe applications are disclosed and may include placing a semiconductor die on bond fingers...
2019/0043788 SEMICONDUCTOR DEVICE
A leadframe of a semiconductor device includes a die pad, first and second suspension leads, and a frame. The main surfaces of the die pad and the frame are...
2019/0043787 METHOD OF PRODUCING ELECTRONIC COMPONENTS, CORRESPONDING ELECTRONIC COMPONENT
A method of producing electronic components including at least one circuit having coupled therewith electrical connections including metallic wire bondable...
2019/0043786 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, CIRCUIT SUBSTRATE,...
A semiconductor device includes an integrated circuit that is disposed at a first face side of a semiconductor substrate, the semiconductor substrate having a...
2019/0043785 COOLANT CONTACT TYPE COOLING SYSTEM FOR HIGH-POWER DEVICE AND OPERATION METHOD THEREOF
Disclosed is a working contact cooling system for a high-power device (1), wherein the sealed case body (8) is a structure having inner and outer layers, a...
2019/0043784 Series Circuit Arrangement of Power Semiconductors
The present disclosure relates to semiconductors. Some embodiments may include a series circuit arrangement of power semiconductors comprising: cooling-water...
2019/0043783 HEAT TRANSFER DEVICE WITH FINS DEFINING AIR FLOW CHANNELS
An exemplary cooling system includes a heat transfer device having a base and a plurality of curved fins defining a curved air flow channel. Air flow is...
2019/0043782 CONFIGURABLE WICKLESS CAPILLARY-DRIVEN CONSTRAINED VAPOR BUBBLE (CVB) HEAT PIPE STRUCTURES
An integrated circuit package may include one or more integrated circuit dies and reconfigurable constrained vapor bubble (CVB) heat pipe structures formed on...
2019/0043781 POWER MODULE AND METHOD FOR MANUFACTURING POWER MODULE
The present invention concerns a power module comprising a heat sink, a substrate on which a power die is attached, the power module further comprises between...
2019/0043780 SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor package device comprises a substrate, an electrical component and a package body. The electrical component is disposed on the substrate. The...
2019/0043779 ELECTRONIC DEVICE INCLUDING COOLING STRUCTURE
An electronic device according to various embodiments of the present disclosure includes a housing, a printed circuit board located inside the housing, an...
2019/0043778 SWAGING PROCESS FOR COMPLEX INTEGRATED HEAT SPREADERS
Embodiments are generally directed to a swaging process for complex integrated heat spreaders. An embodiment of an integrated heat spreader includes...
2019/0043777 SEMICONDUCTOR PACKAGE FOR INCREASING HEAT RADIATION EFFICIENCY
A semiconductor package includes a thermal interface material layer located on semiconductor chips located on a surface of a substrate, and a curved surface...
2019/0043776 DUAL-SIDED PACKAGE ASSEMBLY PROCESSING
Techniques and mechanisms for providing packaged circuitry. In an embodiment, first circuit structures are coupled to a release layer on a first side of a...
2019/0043775 MOLDED AIR CAVITY PACKAGES AND METHODS FOR THE PRODUCTION THEREOF
Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a...
2019/0043774 MOLDED AIR CAVITY PACKAGES AND METHODS FOR THE PRODUCTION THEREOF
Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a base...
2019/0043773 SEMICONDUCTOR MOLD COMPOUND TRANSFER SYSTEM AND ASSOCIATED METHODS
Mold compound transfer systems and methods for making mold compound transfer systems are disclosed herein. A method configured in accordance with a particular...
2019/0043772 SYSTEMS, METHODS, AND APPARATUSES FOR IMPLEMENTING A THERMAL SOLUTION FOR 3D PACKAGING
In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for implementing a thermal solution for 3D packaging. For...
2019/0043771 SEMICONDUCTOR PACKAGE INCLUDING LID STRUCTURE WITH OPENING AND RECESS
A semiconductor package structure including a package substrate, at least one semiconductor die, a lid structure, a first electronic component and a heat sink...
2019/0043770 ELECTRONIC COMPONENT HOUSING PACKAGE, MULTI-PIECE WIRING SUBSTRATE, ELECTRONIC APPARATUS, AND ELECTRONIC MODULE
An electronic component housing package includes an insulating substrate having a first principal face and a second principal face opposing the first principal...
2019/0043769 SPLIT PROBE PAD STRUCTURE AND METHOD
A structure and method for forming a split probe pad structure for a semiconductor structure. The split probe pad structure may include a first probe pad...
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