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Patent # Description
2019/0043616 SYSTEMS AND METHODS FOR PERSONAL EMERGENCY
In various embodiments, a personal emergency detection, notification, coordination and response method and system for individuals is disclosed. A monitoring...
2019/0043615 PORTABLE EMERGENCY TELEHEALTH SYSTEM AND METHOD
A system and method for providing remote healthcare. The system includes a server and a medical kit. A remote patient in need of medical care or a bystander...
2019/0043614 INDIVIDUAL HEALTH RECORD SYSTEM AND APPARATUS
A system, apparatus, and related methods for the collection, processing, evaluation, transformation, and reporting of individual health care information from...
2019/0043613 TRACKING PROGRAM INTERFACE
Computer systems and methods are provided for tracking a user. Data for a first user, including a first identifier associated with the first user, is received....
2019/0043612 MEDICAL IMAGE ORIENTATION
Patient imaging systems suffer from the disadvantage that it is not clear to a medical professional using such systems which image view is the correct way...
2019/0043611 ANONYMIZING DATA
There is provided an apparatus (104) for storing medical imaging data. The apparatus comprises a processor configured to acquire a medical imaging study...
2019/0043610 PLATFORM AND SYSTEM FOR DIGITAL PERSONALIZED MEDICINE
The digital personalized medicine system uses digital data to assess or diagnose symptoms of a subject to provide personalized or more appropriate therapeutic...
2019/0043609 Wireless Network Identification of Electronic Patient Charts
Systems and methods for managing patient information on a primary computer system involving the creation of an electronic patient chart; receiving updated...
2019/0043608 TERMINAL DEVICE
A terminal device configured to be able to communicate with a measuring device for measuring biological information includes a first processing unit executing...
2019/0043607 DENTAL CHARTING DATA PROCESSING SYSTEMS AND RELATED METHODS
A dental charting data processing system and method enable a user to enter charting data during a dental examination by: (1) identifying a particular tooth;...
2019/0043606 PATIENT-PROVIDER HEALTHCARE RECOMMENDER SYSTEM
Systems and methods for providing an optimal healthcare provider match to a patient by a predictive engine employing machine learning.
2019/0043605 Systems and Methods for Analyzing Health Care Data to Improve Billing and Decision Processes
A method is described herein comprising providing an electronic interface for collecting health care data, wherein the electronic interface integrates with one...
2019/0043604 MULTI-LEVEL MEMORY REPURPOSING
An embodiment of a semiconductor apparatus may include technology to receive a request to modify a configuration of a persistent storage media, and repurpose a...
2019/0043603 Hierarchical Fail Bit Counting Circuit In Memory Device
Apparatuses and techniques for counting 0 or 1 bits in a set of bits using both serial and parallel processes. The counting process includes a hierarchy in...
2019/0043602 FAILURE INDICATOR PREDICTOR (FIP)
A memory controller includes a memory to store results of a reference performance test (RT) performed on a non-volatile memory (NVM) die, where the results of...
2019/0043601 Built-In-Self-Test Circuits And Methods Using Pipeline Registers
An integrated circuit includes a built-in-self-test circuit that generates output test signals and a circuit tested by the built-in-self-test circuit. The...
2019/0043600 MEMORY ORGANIZATION FOR SECURITY AND RELIABILITY
A method and apparatus for retrieving data from a memory in which data, an associated message authentication code (MAC) and an associated error correction code...
2019/0043599 SAMPLE-AND-HOLD CIRCUIT FOR A LIDAR SYSTEM
The present invention relates to a sample-and-hold circuit comprising a plurality of sample-and-hold branches arranged in parallel and each comprising a buffer...
2019/0043598 METHOD OF PROPAGATING MAGNETIC DOMAIN WALL IN MAGNETIC DEVICES
The disclosed technology generally relates to magnetic devices, and more particularly to magnetic devices configured to generate a stream of domain walls...
2019/0043597 APPARATUSES AND METHODS INCLUDING ANTI-FUSES AND FOR READING AND PROGRAMMING OF SAME
Apparatuses and methods including anti-fuses and for reading and programming same are disclosed herein. An example apparatus may include an anti-fuse element...
2019/0043595 MITIGATING DISTURBANCES OF MEMORY CELLS
Methods, systems, and devices for techniques to mitigate disturbances of unselected memory cells in a memory array during an access operation are described. A...
2019/0043594 METHOD AND SYSTEM FOR REDUCING PROGRAM DISTURB DEGRADATION IN FLASH MEMORY
Reduction of program disturb degradation in a flash memory cell array is facilitated by selectively switching wordline voltage levels in a sequence that...
2019/0043593 METHOD AND APPARATUS TO PRIORITIZE READ RESPONSE TIME IN A POWER-LIMITED STORAGE DEVICE
A reduction in Quality of Service (QoS) latency for host read commands in a power limited operation mode in a storage device is provided. A priority level is...
2019/0043592 MEMORY DEVICES WITH READ LEVEL CALIBRATION
Several embodiments of memory devices and systems with read level calibration are disclosed herein. In one embodiment, a memory device includes a controller...
2019/0043591 BLOCK BY DECK OPERATIONS FOR NAND MEMORY
A controller for a NAND memory array is presented. In embodiments, the controller may include circuitry to provide bias voltages to a NAND memory array that...
2019/0043590 MEMORY DEVICES WITH READ LEVEL CALIBRATION
Several embodiments of memory devices and systems with read level calibration are disclosed herein. In one embodiment, a memory device includes a controller...
2019/0043589 ONE-SIDED SOFT READS
One-sided soft reads can enable improved error-correction over regular reads without significantly increasing the latency for reads. In one example, a flash...
2019/0043588 STATE-DEPENDENT READ VOLTAGE THRESHOLD ADAPTATION FOR NONVOLATILE MEMORY
A controller adapts the read voltage thresholds of a memory unit in a non-volatile memory. In one embodiment, the controller determines, based on statistics...
2019/0043587 READ ONLY MEMORY
A read only memory (ROM) is provided in the present invention, which includes a plurality of bit lines extending in a first direction, a plurality of source...
2019/0043586 SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD THEREFOR
To prolong the lifetime of a semiconductor memory device without performing complicated control. A semiconductor memory device according to one embodiment is...
2019/0043585 TAILORING TIMING OFFSETS DURING A PROGRAMMING PULSE FOR A MEMORY DEVICE
Technology for a memory device is described. The memory device can include an array of memory cells and a memory controller. The memory controller can receive...
2019/0043584 MEMORY DEVICE AND METHOD OF OPERATING THE SAME
Presented herein is a memory device and a method of operating the memory device. The memory device may include a memory cell, and a page buffer coupled to the...
2019/0043583 CLUSTERING EVENTS IN A CONTENT ADDRESSABLE MEMORY
Provided are an apparatus, video processing unit, and method for clustering events in a content addressable memory. An event is received including at least one...
2019/0043582 SEMICONDUCTOR STORAGE DEVICE
A semiconductor storage device includes: a first memory cell joined to first and second word lines and a first match line; and a second memory cell joined to...
2019/0043581 SEMICONDUCTOR INTEGRATED CIRCUIT
A semiconductor integrated circuit according to an embodiment includes: first to third wiring lines; first memory elements disposed in a cross region between...
2019/0043580 RESET REFRESH TECHNIQUES FOR SELF-SELECTING MEMORY
Reset refresh techniques are described, which can enable reducing or canceling the drift of threshold voltage distributions exhibited by memory cells. In one...
2019/0043579 Reconfigurable Phase Change Device
A reconfigurable phase change device with methods for operating and forming the same are disclosed. An example device can comprise a reconfigurable layer...
2019/0043578 IMPEDANCE TUNING BETWEEN PACKAGING AND DIES
An apparatus may include a controller configured to communicate with a plurality of dies via a signal path. The controller may notify the dies of its desire to...
2019/0043577 MEMRISTIVE ARRAYS WITH A WAVEFORM GENERATION DEVICE
In one example in accordance with the present disclosure a memristive array is described. The memristive array includes a number of bit cells, each bit cell...
2019/0043576 TAILORING CURRENT MAGNITUDE AND DURATION DURING A PROGRAMMING PULSE FOR A MEMORY DEVICE
Technology for a memory device is described. The memory device can include an array of memory cells and a memory controller. The memory controller can receive...
2019/0043575 PROGRAMMABLE ARRAY LOGIC CIRCUIT AND OPERATING METHOD THEREOF
This disclosure introduces a programmable array logic (PAL) circuit and a method which are capable of preventing a read disturbance effect on memory cells of...
2019/0043574 Phase-Change Memory Device with Drive Circuit
A memory device includes an array of phase-change memory cells and a word line. The memory device includes a control circuit, a first pull-up MOSFET and a...
2019/0043573 MEMRISTIVE CONTROL CIRCUITS WITH CURRENT CONTROL COMPONENTS
In one example in accordance with the present disclosure a control circuit is described. The control circuit includes a source following component to receive...
2019/0043572 METHODS AND SYSTEMS FOR PERFORMING A CALCULATION ACROSS A MEMORY ARRAY
Devices for computing the sum of multiple Vector-Vector Dot-Products (VVDP) or multiple partial sums of VVDP can include a resistive memory array and a...
2019/0043571 MEMORY PRESET ADJUSTMENT BASED ON ADAPTIVE CALIBRATION
A memory device includes a memory array having multiple nonvolatile memory cells that stores data as a set or a reset state of the memory cells. The...
2019/0043570 MEMORY CELL INCLUDING MULTI-LEVEL SENSING
An embodiment of a semiconductor apparatus may include technology to convert an analog voltage level of a memory cell of a multi-level memory to a multi-bit...
2019/0043569 THREE DIMENSIONAL MEMORY AND METHOD OF OPERATING THE SAME
Provided is a three dimensional memory including a substrate, a plurality of source lines, a plurality of isolation structures, a plurality of drain lines, a...
2019/0043568 SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM
A semiconductor memory device includes a first memory cell array including a first memory cell that is capable of holding two or more bits of data including at...
2019/0043567 TEMPERATURE-DEPENDENT READ OPERATION TIME ADJUSTMENT IN NON-VOLATILE MEMORY DEVICES
An apparatus and/or system is described including a memory device or a controller for a memory device to perform an adjustment of a read operation time for...
2019/0043566 DEMARCATION VOLTAGE DETERMINATION VIA WRITE AND READ TEMPERATURE STAMPS
A non-volatile memory receives a request from a controller to read data stored in the memory. Moving read references are adjusted as a function of the...
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