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Patent # Description
2019/0043565 METHOD AND SYSTEM FOR COMPENSATING FOR FLOATING GATE-TO-FLOATING GATE (FG-FG) INTERFERENCE IN FLASH MEMORY CELL...
Embodiments of the present disclosure provide methods, devices, modules, and systems for compensating for floating gate to floating gate (fg-fg) interference...
2019/0043564 SYSTEM AND METHOD FOR PERFORMING A CONCURRENT MULTIPLE PAGE READ OF A MEMORY ARRAY
A system for facilitating multiple concurrent page reads in a memory array is provided. Memory cells that have multiple programming states (e.g., store...
2019/0043563 PROGRAM VERIFICATION TIME REDUCTION IN NON-VOLATILE MEMORY DEVICES
An apparatus and/or system is described including a memory device or a controller to perform programming and verification operations including application of a...
2019/0043562 MEMORY DEVICES WITH VOLATILE AND NON-VOLATILE BEHAVIOR
An example device in accordance with an aspect of the present disclosure includes an active oxide layer to form and dissipate a conductive bridge. The...
2019/0043561 READING CIRCUIT AND METHOD
A reading circuit is provided in the invention. The reading circuit includes a sensitive amplifier circuit and a latch circuit. A sensitive amplifier circuit...
2019/0043560 IN-MEMORY MULTIPLY AND ACCUMULATE WITH GLOBAL CHARGE-SHARING
A memory circuit has compute-in-memory circuitry that enables a multiply-accumulate (MAC) operation based on shared charge. Row access circuitry drives...
2019/0043559 TEMPERATURE MANAGEMENT IN OPEN-CHANNEL MEMORY DEVICES
Embodiments of the present disclosure are directed towards apparatuses and methods for temperature management of a non-volatile memory device, e.g., an...
2019/0043558 PARTIAL REFRESH TECHNIQUE TO SAVE MEMORY REFRESH POWER
In a conventional memory subsystem, a memory controller issues explicit refresh commands to a DRAM memory device to maintain integrity of the data stored in...
2019/0043557 PERIODIC CALIBRATIONS DURING MEMORY DEVICE SELF REFRESH
A memory device is described. The memory device includes logic circuitry to perform calibrations of resistive network terminations and data drivers of the...
2019/0043556 NON VOLATILE MASS STORAGE DEVICE WITH IMPROVED REFRESH ALGORITHM
A refreshing method is described. The method includes recognizing a set of blocks of a non-volatile memory for refreshing and then refreshing a subset of the...
2019/0043555 Protocol For Refresh Between A Memory Controller And A Memory Device
The present embodiments provide a system that supports self-refreshing operations in a memory device. During operation, the system transitions the memory...
2019/0043554 MEMORY DEVICE COMPRISING ELECTRICALLY FLOATING BODY TRANSISTOR
A semiconductor memory instance is provided that includes an array of memory cells. The array includes a plurality of semiconductor memory cells arranged in at...
2019/0043553 DUAL ROW-COLUMN MAJOR DRAM
A memory device includes an array of 2T1C DRAM cells and a memory controller. The DRAM cells are arranged as a plurality of rows and columns of DRAM cells. The...
2019/0043552 PSEUDO-CHANNELED DRAM
An embodiment of a semiconductor apparatus may include technology to provide two or more dynamic random access memory devices, and provide access to the two or...
2019/0043551 MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT
An integrated circuit includes a physical layer interface having a control timing domain and a data timing domain, and circuits that enable the control timing...
2019/0043550 INPUT BUFFER CIRCUIT
Apparatuses for receiving an input data signal are described. An example apparatus includes: a plurality of data input circuits and an internal data strobe...
2019/0043549 SAVE-RESTORE CIRCUITRY WITH METAL-FERROELECTRIC-METAL DEVICES
Embodiments include apparatuses, methods, and systems associated with save-restore circuitry including metal-ferroelectric-metal (MFM) devices. The...
2019/0043548 MEMORY DEVICE
The present invention provides a memory device in which a lower electrode, a seed layer, synthetic exchange diamagnetic layers, a separation layer, a magnetic...
2019/0043547 Three Terminal Spin Hall MRAM
Improved spin hall MRAM designs are provided that enable writing of all of the bits along a given word line together using a separate spin hall wire for each...
2019/0043546 SEMICONDUCTOR DEVICES
A semiconductor device may include a power supply circuit, a word line control circuit, and a memory circuit. The power supply circuit may drive a pre-charge...
2019/0043545 METHODS OF DETERMINING HOST CLOCK FREQUENCY FOR RUN TIME OPTIMIZATION OF MEMORY AND MEMORY DEVICES EMPLOYING...
A memory device is provided. The memory device includes one or more memories and a connector operably coupled to the one or more memories and configured to...
2019/0043544 PROCESSING DEVICE WITH NONVOLATILE LOGIC ARRAY BACKUP
A processing device is operated using a plurality of volatile storage elements. N groups of M volatile storage elements of the plurality of volatile storage...
2019/0043543 OUTPUT DRIVER FOR MULTI-LEVEL SIGNALING
A driver of a multi-level signaling interface is provided. The driver may be configured reduce noise in a multi-level signal (e.g., a pulse amplitude...
2019/0043542 READING CIRCUITS AND METHODS
A reading circuit is provided in the invention. The reading circuit includes a pre-charger, a bit-line selecting circuit, and a latch circuit. The pre-charger...
2019/0043541 SYSTEM AND METHOD FOR PROVIDING A CONFIGURABLE TIMING CONTROL FOR A MEMORY SYSTEM
A system and method for providing a configurable timing control of a memory system is disclosed. In one embodiment, the system has a first interface to receive...
2019/0043540 ADAPTIVE OBJECT BUFFERING AND META-DATA INDEXING USING PERSISTENT MEMORY TO IMPROVE FLASH MEMORY DURABILITY IN...
Examples include techniques for storing an object in a non-volatile memory in a solid-state storage device (SSD), the SDD supporting input/output (I/O)...
2019/0043539 APPARATUS AND METHODS TO PROVIDE POWER MANAGEMENT FOR MEMORY DEVICES
An apparatus, such as a nonvolatile solid-state memory device, may, in some implementations, include access line bias circuitry to set a bias level associated...
2019/0043538 PHASE CONTROL BETWEEN REGULATOR OUTPUTS
Various embodiments, disclosed herein, include apparatus and methods to provide separate regulated voltages to an electronic device. Multiple voltage...
2019/0043537 LAYERED SEMICONDUCTOR DEVICE, AND PRODUCTION METHOD THEREFOR
A layered semiconductor device capable of improving production yield and a method for producing the layered semiconductor device. The layered semiconductor...
2019/0043536 Sector-Aligned Memory Accessible to Programmable Logic Fabric of Programmable Logic Device
An integrated circuit device may include programmable logic fabric on a first integrated circuit die and sector-aligned memory on a second integrated circuit...
2019/0043535 INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM
The present technology relates to an information processing apparatus, an information processing method, and a program, capable of specifying attributes of all...
2019/0043534 MEDIA IDENTIFIER GENERATION FOR CAMERA-CAPTURED MEDIA
A video identifier uniquely identifying a video captured by a camera is generated. The video includes video frames and optionally concurrently captured audio...
2019/0043533 SYSTEM AND METHOD FOR EFFECTUATING PRESENTATION OF CONTENT BASED ON COMPLEXITY OF CONTENT SEGMENTS THEREIN
This disclosure describes a system that effectuates presentation of video content based on complexity of video content segments therein. The system may analyze...
2019/0043532 METHOD AND APPARATUS FOR COMPREHENSIVE VEHICLE SYSTEM STATE CAPTURE
A system includes a processor configured to receive a capture instruction from a vehicle user. The processor is also configured to capture a plurality of...
2019/0043531 SUSPENSION ADJACENT-CONDUCTORS DIFFERENTIAL-SIGNAL-COUPLING ATTENUATION STRUCTURES
Disclosed herein are suspension assembly structures for data storage devices that include physical or virtual crossovers of the pairs of differential signal...
2019/0043530 NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM, VOICE SECTION DETERMINATION METHOD, AND VOICE SECTION...
A voice section determination method including determining, for each of a plurality of sound frames, whether each of the plurality of sound frames corresponds...
2019/0043529 SPEECH CLASSIFICATION OF AUDIO FOR WAKE ON VOICE
Speech or non-speech detection techniques are discussed and include updating a speech pattern model using probability scores from an acoustic model to generate...
2019/0043528 EXTRACTING SIGNALS FROM PAIRED RECORDINGS
A system, method and computer product for extracting an activity from recordings. The method comprises searching for signals representing plural versions of a...
2019/0043527 ROUTING AUDIO STREAMS BASED ON SEMANTICALLY GENERATED RESULT SETS
An example apparatus for routing audio streams includes an audio receiver to receive audio from a microphone. The apparatus also includes a classifier to...
2019/0043526 STRESS MANAGEMENT THROUGH VOICE DATA ANALYSIS
An example mobile system is disclosed. The system comprises an audio input device to continuously capture audio data associated with a user, a display unit, a...
2019/0043525 AUDIO EVENTS TRIGGERING VIDEO ANALYTICS
A system, apparatus, method, and computer readable medium for using an audio trigger for surveillance in a security system. The method including receiving an...
2019/0043524 VIBRATION SENSOR SIGNAL TRANSFORMATION BASED ON SMOOTH AVERAGE SPECTRUMS
Apparatuses and methods for transforming a signal from a vibration sensor into an approximation of a signal from a microphone are disclosed. The vibration...
2019/0043523 FREQUENCY BAND EXTENSION APPARATUS, FREQUENCY BAND EXTENSION METHOD, AND PROGRAM
The present technique relates to a frequency band extension apparatus, a frequency band extension method, and a program which are configured to more easily...
2019/0043522 AUDIO ENCODER, AUDIO DECODER AND RELATED METHODS USING TWO-CHANNEL PROCESSING WITHIN AN INTELLIGENT GAP FILLING...
An apparatus for generating a decoded two-channel signal includes: an audio processor for decoding an encoded two-channel signal to obtain a first set of first...
2019/0043521 Automatic Gain Adjustment for Improved Wake Word Recognition in Audio Systems
A mechanism is described for facilitating automatic gain adjustment in audio systems according to one embodiment. A method of embodiments, as described herein,...
2019/0043520 DETECTION AND REDUCTION OF WIND NOISE IN COMPUTING ENVIRONMENTS
A mechanism is described for facilitating wind detection and wind noise reduction in computing environments according to one embodiment. An apparatus of...
2019/0043519 ACTIVE ACOUSTIC ECHO CANCELLATION FOR ULTRA-HIGH DYNAMIC RANGE
Techniques related to active acoustic echo cancellation are discussed. Such techniques may include generating an audio output signal having a portion thereof...
2019/0043518 CAPTURE AND EXTRACTION OF OWN VOICE SIGNAL
Methods and systems employing an internal microphone and an external microphone of a headset to capture own voice content in the presence of noise, extract the...
2019/0043517 SELECTION BETWEEN SIGNAL SOURCES BASED UPON CALCULATED SIGNAL TO NOISE RATIO
Apparatuses and methods for selecting, for communicating, between signals provided by various pickups on the basis of a calculated signal to noise ratio (SNR)...
2019/0043516 NEURAL NETWORK FOR SPEECH DENOISING TRAINED WITH DEEP FEATURE LOSSES
Techniques are provided for speech denoising using a denoising neural network (NN) trained with deep feature losses obtained from an audio classifier NN. A...
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