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Patent # Description
2019/0079896 VIRTUALIZING CONNECTION MANAGEMENT FOR VIRTUAL REMOTE DIRECT MEMORY ACCESS (RDMA) DEVICES
Described herein are systems, methods, and software to enhance virtualization connection management for virtual remote direct memory access (RDMA) devices. In...
2019/0079895 SYSTEM AND METHOD FOR MAXIMIZING BANDWIDTH OF PCI EXPRESS PEER-TO-PEER (P2P) CONNECTION
A method and system for maximizing bandwidth of a Peripheral Component Interconnect Express (PCIe) Peer-to-Peer (P2P) connection determine a maximum bandwidth...
2019/0079894 METHOD, CLIENT DEVICE AND DATA FORWARDING DEVICE FOR TRANSMITTING DATA THROUGH SERIAL PORT
The present invention discloses a method, a client device, and a data forwarding device for transmitting data through a serial port. The method comprises...
2019/0079893 SWITCHING REDUCTION BUS USING DATA BIT INVERSION WITH SHIELD LINES
Apparatus and methods structured with respect to a data bus having a number of data lines and a number of shield lines can be implemented in a variety of...
2019/0079892 DATA TRANSMISSION CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM INCLUDING THE DATA TRANSMISSION...
A data transmission circuit includes a data bus inversion encoding circuit configured to compare previous output data and current output data, invert or...
2019/0079891 ULTRA HIGH CAPACITY SOLID STATE DRIVE
A solid state drive with modular memory. The solid state drive may include a modular array of memory cards installed on a controller board, each memory card...
2019/0079890 Adapters, Systems And Methods For Adapting PCIe Expansion Cards To PCIe Component Bays
Adapters, systems and methods are provided that may be implemented to adapt a Peripheral Component Interconnect Express (PCIe) expansion (or add-in) card for...
2019/0079889 COMMUNICATION NETWORK, ASSOCIATED MEASURING SYSTEM, TRANSPORTATION MEANS AND METHOD FOR BUILDING A...
This communication network (18) extends between a plurality of input blocks (E.sub.1, . . . , E.sub.N1) including a predetermined number P1 of input ports and...
2019/0079888 INFORMATION PROCESSING APPARATUS
System host (2) requests a command to local device (6), and local host (10) interprets the requested command and issues the command to local device (6). Local...
2019/0079887 Remote Host Management Using Socket-Direct Network Interface Controllers
A network adapter includes one or more network ports, multiple bus interfaces, and a processor. The one or more network ports are configured to communicate...
2019/0079886 HETEROGENEOUS ACCELERATOR FOR HIGHLY EFFICIENT LEARNING SYSTEMS
An apparatus may include a heterogeneous computing environment that may be controlled, at least in part, by a task scheduler in which the heterogeneous...
2019/0079885 METHOD AND APPARATUS FOR LOADING A MATRIX INTO AN ACCELERATOR
An apparatus for performing a method for loading a matrix into an accelerator includes an augmented direct memory access controller reading a matrix, in a data...
2019/0079884 Method and Apparatus for Indicating Interrupts
An interrupt mechanism is disclosed. In one embodiment an integrated circuit (IC) is coupled to a number of peripheral devices, via a bus, and includes an...
2019/0079883 EVENT SYSTEM AND METHODS FOR USING SAME
Event systems and methods are provided through which applications can manage input/output operations ("I/O") and inter-processor communications. An event...
2019/0079882 OPERATION METHODS OF NONVOLATILE MEMORY DEVICES AND OPERATION METHODS OF MEMORY CONTROLLERS
An operation method performed at a nonvolatile memory device may include receiving a program command and an address from an external device through a data...
2019/0079881 MEMORY ACCESS CONTROL DEVICE, IMAGE PROCESSING DEVICE, AND IMAGING DEVICE
The present invention provides a plurality of bus masters configured to output an access request to a memory in which an address space is divided into a...
2019/0079880 AUTOMATICALLY CONFIGURING THE SETTINGS OF PERIPHERAL DEVICES
Systems and methods for configuring the settings of a peripheral device are provided. In one implementation, a method includes a step of determining when the...
2019/0079879 PROTECTED MEMORY AREA
In some examples, a protected memory area inaccessible to an operating system stores information relating to instructions, where the protected memory area...
2019/0079878 SECURITY SYSTEM USING RANDOM NUMBER BIT STRING
A security system includes a physical unclonable function circuit, a write-in protection circuit, a memory, and a readout decryption circuit. The physical...
2019/0079877 System, Apparatus And Method For Prefetch-Aware Replacement In A Cache Memory Hierarchy Of A Processor
In one embodiment, a processor includes: a first cache controller to control a first cache memory. This cache controller may include a replacement circuit to:...
2019/0079876 DIGITAL DEVICE AND METHOD FOR CONTROLLING THE SAME
Disclosed are a digital device and data processing method thereof. The present invention includes a first memory, a second memory used as a swap space of page...
2019/0079875 EFFICIENT PROVISIONING OF VIRTUAL MACHINES TO ENDPOINT COMPUTING ENVIRONMENT
Provisioning a virtual disk at an endpoint client, involves calculating local hash values for local blocks comprising a local operating system boot disk and...
2019/0079874 CACHE LINE STATUSES
A method can include allowing re-use of a selected shareable tag storage location and thus updating a first shareable tag portion comprised therein to a second...
2019/0079873 ELECTRONIC DEVICE HAVING VARIABLE RESISTANCE ELEMENT
An electronic device includes semiconductor memory, the semiconductor memory including an under layer; a first magnetic layer located over the under layer and...
2019/0079872 CONTROLLING A RATE OF PREFETCHING BASED ON BUS BANDWIDTH
Controlling a rate of prefetching based on bus bandwidth. A determination is made as to whether a rate of prefetching data from memory into a cache is to be...
2019/0079871 CONTROLLING A RATE OF PREFETCHING BASED ON BUS BANDWIDTH
Controlling a rate of prefetching based on bus bandwidth. A determination is made as to whether a rate of prefetching data from memory into a cache is to be...
2019/0079870 ARITHMETIC PROCESSING UNIT AND METHOD FOR CONTROLLING ARITHMETIC PROCESSING UNIT
An arithmetic processing unit includes a cache including a cache memory for storing states of data and data in a block at an index of the memory access...
2019/0079869 DISTRIBUTED COORDINATION OF CACHING AND PROCESSING BY NETWORKING DEVICES
In one embodiment, a device in a network receives one or more data units. The device calculates a hash value based on the one or more data units and using a...
2019/0079868 SNOOP FILTER FOR CACHE COHERENCY IN A DATA PROCESSING SYSTEM
A data processing system, having two or more of processors that access a shared data resource, and method of operation thereof. Data stored in a local cache is...
2019/0079867 CACHE STORAGE
Cache storage comprising cache lines, each configured to store respective data entries. The cache storage is configured to store a tag in the form of: an...
2019/0079866 FAST CACHE WARM-UP
An embodiment of a semiconductor package apparatus may include technology to determine if a memory request for a second level memory results in a miss with...
2019/0079865 Systems, Methods, and Apparatuses, and Memory Hierarchies to Support Speculative Execution
Systems, methods, and apparatuses for decomposing a sequential program into multiple threads, executing these threads, and reconstructing the sequential...
2019/0079864 SERVER-SIDE EXTENSION OF CLIENT-SIDE CACHES
Techniques related to a server-side extension of client-side caches are provided. A storage server computer receives, from a database server computer, an...
2019/0079863 ARITHMETIC PROCESSING APPARATUS AND CONTROL METHOD FOR ARITHMETIC PROCESSING APPARATUS
An arithmetic processing apparatus includes, a plurality of core memory groups, each of core memory groups including a plurality of arithmetic processing...
2019/0079862 LOGICALLY EXPANDING EXISTING MEMORIES IN A DISPERSED STORAGE NETWORK
A dispersed storage network (DSN) includes multiple current storage units logically organized into a DSN memory. A determination is made to add new storage...
2019/0079861 MEMORY SYSTEM AND CONTROL METHOD THEREOF
A memory system includes a nonvolatile memory that has a plurality of physical blocks, and a memory controller circuit configured to execute encoding of data...
2019/0079860 MEMORY CONTROLLER, MEMORY SYSTEM HAVING THE SAME, AND OPERATING METHOD THEREOF
Provided herein may be a memory controller, a memory system having the memory controller, and a method of operating the memory system. The memory controller...
2019/0079859 APPARATUS, COMPUTER PROGRAM PRODUCT, SYSTEM, AND METHOD FOR MANAGING MULTIPLE REGIONS OF A MEMORY DEVICE
Provided are an apparatus, computer program product, system, and method for managing multiple regions of a non-volatile memory device. A first group of logical...
2019/0079858 PREFETCH INSENSITIVE TRANSACTIONAL MEMORY
Processing prefetch memory operations and transactions. A local processor receives a write prefetch request from a remote processor. Prior to execution of a...
2019/0079857 CONTROL SERVICE FOR DATA MANAGEMENT
Aspects of a data environment, such as the creation, provisioning, and management of data stores and instances, are managed using a separate control...
2019/0079856 SOFTWARE TEST AUTOMATION SYSTEM AND METHOD
A method for testing an updated version of an existing software application. The method may comprise analyzing a user interface screen of the updated version...
2019/0079855 ON-DEVICE FEATURE AND PERFORMANCE TESTING AND ADJUSTMENT
Apparatuses, methods, systems, and program products are presented for on-device feature and performance testing and adjustment. An apparatus includes an audit...
2019/0079854 SYSTEMS AND METHODS FOR EXECUTING TESTS
A computer-implemented method for executing tests may include (i) identifying a debugger that enables a developer to execute a test version of an application...
2019/0079853 Automating Identification of Test Cases for Library Suggestion Models
A method, system, and apparatus are disclosed for adding library models to a library knowledge base by defining a template for a library configuration file...
2019/0079852 METHOD OF TESTING PROTOTYPE LINKED WITH EXISTING APPLICATION
Provided is a method of testing a prototype linked with an application without rebuilding the application. The method is performed by a user terminal in which...
2019/0079851 MID-METHOD INSTRUMENTATION
A system for preforming mid-method instrumentation includes a processor; a memory: and one or more modules stored in the memory and executable by a processor...
2019/0079850 SYSTEMS AND METHODS FOR IDENTIFYING AND TRACKING APPLICATION PERFORMANCE INCIDENTS
A computer-implemented method for identifying and tracking application performance incidents may include (1) receiving, by an incident tracking system, data...
2019/0079849 ENVIRONMENT SIMULATIONS
Example implementations relate to simulating an environment. For example, a system for environment simulation may include a simulation engine to build an...
2019/0079848 PRESCRIPTIVE ANALYTICS BASED ACTIVATION TIMETABLE STACK FOR CLOUD COMPUTING RESOURCE SCHEDULING
A multi-layer activation timetable stack may generate prescriptive activation timetables for controlling activation states for computing resources. An input...
2019/0079847 MULTI-LAYER AUTOSCALING FOR A SCALE-UP CLOUD SERVER
A computer-implemented scaling method, an apparatus, and a computer program product for detecting whether a performance of a system reaches a target...
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