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Patent # Description
2019/0115292 SEMICONDUCTOR PACKAGE WITH TERMINAL PATTERN FOR INCREASED CHANNEL DENSITY
Described examples include an apparatus, including: a substrate having a first surface configured to mount at least one integrated circuit and having a second...
2019/0115291 CHIP PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A chip package structure can include: a lead frame having a plurality of pins, a first die pad, and a second die pad; a first die and a second die, where a...
2019/0115290 SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor layer that has a main surface including a defined region defined by a trench, a trench insulation layer formed...
2019/0115289 LEAD FRAME ASSEMBLY
A leadframe assembly includes a leadframe having a die attach pad and a first plurality of leads. A first generally sine wave-shaped wire having a first end...
2019/0115288 LEAD FRAME AND ELECTRONIC COMPONENT DEVICE
There is provided a lead frame. The lead frame includes: a die pad; a lead terminal that is separated from the die pad and disposed around the die pad; and a...
2019/0115287 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, CORRESPONDING DEVICE AND CIRCUIT
A method of manufacturing semiconductor devices such as integrated circuits comprises: providing one or more semiconductor chips having first and second...
2019/0115286 SEMICONDUCTOR DEVICE WITH FLEXIBLE CIRCUIT FOR ENABLING NON-DESTRUCTIVE ATTACHING AND DETACHING OF DEVICE TO...
A semiconductor device assembly that includes a flexible member having a first portion connected to a substrate and a connector attached to a second portion of...
2019/0115285 LEAD STRUCTURE OF CIRCUIT
The present invention discloses a lead structure of the circuit, which comprises a first lead and a second lead. The first lead includes a first bump...
2019/0115284 COOLING DEVICE AND METHOD FOR HEAT-GENERATING COMPONENTS
A cooling device having internal pathways that define separate first and second flow circuits, each configured to direct a coolant at first and second mass...
2019/0115283 POWER MODULE
A power module includes: a power chip; a control chip controlling the power chip; a power terminal connected to the power chip; a control terminal connected to...
2019/0115282 HEAST SINK FASTENING SEAT FOR USE WITH ELECTRICAL CONNECTOR
An electrical connector assembly for connecting the CPU and the printed circuit board, includes an electrical connector and a back plate respectively mounted...
2019/0115281 MAGNETICALLY AFFIXED HEAT SPREADER
There is disclosed in one example a computing apparatus, including: an active computing element; a first magnetic attractor mechanically coupled to the active...
2019/0115280 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes forming an isolation layer on a substrate....
2019/0115279 HEAT SINK PLATE
A heat sink plate having a structure in which two or more kinds of materials are laminated, includes: a core layer in the thickness direction of the heat sink...
2019/0115278 HEAT DISSIPATION USING NANOSCALE MATERIALS
Systems and methods for heat dissipation are described. Systems and methods may include a gradient nanoparticle structure applied to a substrate, such as...
2019/0115277 Package Structure for Heat Dissipation
A package structure and method of manufacturing is provided, whereby heat dissipating features are provided for heat dissipation. Heat dissipating features...
2019/0115276 Semiconductor Thermal-Conductive Heat Sink Structure
The present invention relates to a semiconductor thermal-conductive heat sink structure including a substrate and a thermal-conductive heat sink device. The...
2019/0115275 SEMICONDUCTOR PACKAGE AND RELATED METHODS
Implementations of semiconductor packages may include: a substrate comprising a first side and a second side and a hole in the substrate. The hole extending...
2019/0115274 BACKPLANE STRUCTURE AND PROCESS FOR MICRODRIVER AND MICRO LED
Micro LED and microdriver chip integration schemes are described. In an embodiment a microdriver chip includes a plurality of trenches formed in a bottom...
2019/0115273 SYSTEMS AND METHODS TO ENHANCE PASSIVATION INTEGRITY
Some embodiments relate to a semiconductor device. The semiconductor device includes a layer disposed over a substrate. A conductive body extends through the...
2019/0115272 Package Structures and Methods of Forming the Same
An embodiment is a method including: attaching a first die to a first side of a first component using first electrical connectors, attaching a first side of a...
2019/0115271 SEMICONDUCTOR PACKAGES AND MANUFACTURING MEHTODS THEREOF
Sensor packages and manufacturing methods thereof are disclosed. One of the sensor packages includes a semiconductor chip and a redistribution layer structure....
2019/0115270 Stress Tuned Stiffeners for Micro Electronics Package Warpage Control
A semiconductor device assembly including a substrate, a semiconductor device, a stiffener member, and mold compound. The stiffener member is tuned, or...
2019/0115269 SEMICONDUCTOR PACKAGE HAVING A STIFFENER RING
A semiconductor package includes a package substrate having a top surface and a bottom surface, and a stiffener ring mounted on the top surface of the package...
2019/0115268 Semiconductor Device and Method of Forming Dual-Sided Interconnect Structures in FO-WLCSP
A semiconductor device has a substrate with first and second conductive layers formed over first and second opposing surfaces of the substrate. A plurality of...
2019/0115267 METHOD AND APPARATUS FOR DETERMINING PROCESS PARAMETERS
A method for processing a substrate in a processing chamber using at least one time trace based prediction model is provided. A substrate is dry processed,...
2019/0115266 METHOD FOR TESTING BRIDGING IN ADJACENT SEMICONDUCTOR DEVICES AND TEST STRUCTURE
Bridging testing method between adjacent semiconductor devices includes forming patterned diffusion region on semiconductor substrate, and forming first...
2019/0115265 RADIO-FREQUENCY ISOLATION USING POROUS SILICON
A method for fabricating a radio-frequency device involves providing a substrate structure including a silicon handle wafer, an oxide layer formed on the...
2019/0115264 CLIENT-INITIATED LEADER ELECTION IN DISTRIBUTED CLIENT-SERVER SYSTEMS
A method for a client-initiated leader election in a distributed system including receiving a master listener election request by at least one listener of a...
2019/0115263 SEMICONDUCTOR FIN PATTERNING TECHNIQUES TO ACHIEVE UNIFORM FIN PROFILES FOR FIN FIELD EFFECT TRANSISTORS
Methods are provided for fabricating semiconductor fins having uniform profiles. For example, a method includes forming semiconductor fins on a substrate,...
2019/0115262 Method of Forming Source/Drain Contact
Methods are disclosed herein for fabricating semiconductor devices having shared source/drain contacts. An exemplary semiconductor device includes a...
2019/0115261 SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING THE SAME
A semiconductor device includes a first gate structure, a second gate structure, a first source/drain structure and a second source/drain structure. The first...
2019/0115260 TRANSISTOR STRUCTURE
A transistor structure includes a source region and a drain region disposed in a substrate, extending along a first direction. A polysilicon layer is disposed...
2019/0115259 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A manufacturing method of a semiconductor device includes following steps. First gate structures and second gate structures are formed on a first region and a...
2019/0115258 Through-Vias and Methods of Forming the Same
An integrated circuit structure includes a substrate, a metal ring penetrating through the substrate, a dielectric region encircled by the metal ring, and a...
2019/0115257 GATE CONTACT STRUCTURE OVER ACTIVE GATE AND METHOD TO FABRICATE SAME
Gate contact structures disposed over active portions of gates and methods of forming such gate contact structures are described. For example, a semiconductor...
2019/0115256 Methods for Forming Contact Plugs with Reduced Corrosion
A method includes forming an ILD to cover a gate stack of a transistor. The ILD and the gate stack are parts of a wafer. The ILD is etched to form a contact...
2019/0115255 Seamless Ruthenium Gap Fill
Methods for filling a substrate feature with a seamless ruthenium gap fill are described. The methods include depositing a ruthenium film, oxidizing the...
2019/0115254 Integration Of ALD Copper With High Temperature PVD Copper Deposition For BEOL Interconnect
Methods and apparatus to fill a feature with a seamless gapfill of copper are described. A copper gapfill seed layer is deposited on a substrate surface by...
2019/0115253 METHOD OF FORMING INTERCONNECTION STRUCTURE
A method of forming an interconnection structure includes following steps. A dielectric structure is deposited over a non-insulator structure. The dielectric...
2019/0115252 METHODS OF FORMING A SEMICONDUCTOR DEVICE USING BLOCK COPOLYMER MATERIALS
Methods for fabricating sub-lithographic, nanoscale microstructures utilizing self-assembling block copolymers, and films and devices formed from these methods...
2019/0115251 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method for manufacturing a semiconductor device includes forming a hard mask layer overlying a device layer of a semiconductor device, a mandrel underlayer...
2019/0115250 Integrated Circuit with Conductive Line Having Line-Ends
A semiconductor device is disclosed, including a plurality of conductive features disposed over a substrate. A dielectric layer separates the conductive...
2019/0115249 Low-Resistance Contact Plugs and Method Forming the Same
A method includes forming a first and a second contact opening to reveal a first and a second source/drain region, respectively, forming a mask layer having a...
2019/0115248 SEMICONDUCTOR-ON-INSULATOR SUBSTRATE FOR RF APPLICATIONS
A semiconductor-on-insulator substrate for use in RF applications, such as a silicon-on-insulator substrate, comprises a semiconductor top layer, a buried...
2019/0115247 ROOM TEMPERATURE METAL DIRECT BONDING
A bonded device structure including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a...
2019/0115246 METHODS AND APPARATUS FOR SHIELDING SUBSTRATE SUPPORTS
Apparatus for shielding a substrate support in a semiconductor processing chamber. In some embodiments, the apparatus includes: a substrate support body with a...
2019/0115244 SUCTION MEMBER
A suction member includes a base part (3) and a plurality of protrusions (2). The base part (3) includes a first surface (4). Each of the protrusions (2)...
2019/0115243 Double Layer Release Temporary Bond And Debond Processes And Systems
A bonded structure contains a substrate containing at least one feature, the substrate having a top surface; a first release layer overlying the top surface of...
2019/0115242 MICRO PICK UP ARRAY AND MANUFACTURING METHOD THEREOF
A micro pick-up array used to pick up a micro device is provided. The micro pick-up array includes a substrate, a pick-up structure, and a soft polymer layer....
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