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Patent # Description
2019/0115090 SHIFT REGISTER, DRIVING METHOD THEREOF, GATE DRIVING CIRCUIT, AND DISPLAY APPARATUS
The embodiments of the present disclosure propose a shift register, a driving method thereof, a gate driving circuit and a display apparatus. The shift...
2019/0115089 MEMORY DEVICE TO EXECUTE READ OPERATION USING READ TARGET VOLTAGE
A memory device includes first and second memory strings, first and second word lines and a controller. The first memory string includes first and second...
2019/0115088 Flash Memory System Using Negative High Voltage Level Shifter
During a program, read, or erase operation of one or more non-volatile flash memory cells in an array of non-volatile flash memory cells, a negative voltage...
2019/0115087 MEMORY CARD
A memory card is provided to include a substrate having two pairs of edges facing each other, a plurality of first row terminals that are arranged adjacent to...
2019/0115086 VOLTAGE DRIVER FOR MEMORY
A voltage driver includes a voltage divider, a first transistor and a second transistor. The voltage divider is connected with a first voltage source and a...
2019/0115085 SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM CONFIGURED TO PERFORM TRACKING READ ON FIRST MEMORY CELLS...
A semiconductor memory device includes first, second, and third memory cells, and first, second, and third word lines that are respectively connected to gates...
2019/0115084 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device facilitating an area efficiency of a page buffer/sense circuit and suppressing erroneous operation due to capacitive coupling...
2019/0115083 SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF
In a method for operating a semiconductor memory device including a plurality of memory blocks, the method includes: receiving a read command for a first...
2019/0115082 MEMORY DEVICE COMPRISING FLASH MEMORY AND METHOD FOR CONTROLLING A WRITE SPEED OF A BUS TRANSMITTING DATA FOR...
Memory device comprising flash memory and method for controlling a write speed of a bus transmitting data for storage on the flash memory. The flash memory of...
2019/0115080 METHOD FOR REWRITING DATA IN NONVOLATILE MEMORY AND SEMICONDUCTOR DEVICE
In the present invention, a vacant block which is unwritten is identified as a temporary storage block when a writing destination block has already data...
2019/0115079 SEMICONDUCTOR MEMORY APPARATUS AND OPERATING METHOD OF THE SEMICONDUCTOR MEMORY APPARATUS
A semiconductor memory apparatus includes a memory cell. The semiconductor apparatus includes a current supply circuit configured to change a resistance state...
2019/0115078 STORAGE DEVICE HAVING PARAMETER CALIBRATION FUNCTION, AND OPERATING METHOD THEREOF
An operating method of a storage device includes a controller: receiving read data from a non-volatile memory; measuring a plurality of threshold voltage...
2019/0115077 FLASH MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME
A flash memory device includes a first memory cell, a second memory cell, a row decoder, and a bias generator. The first memory cell is a selected memory cell,...
2019/0115076 NON-VOLATILE MEMORY
A non-volatile memory includes a memory cell. A storage element of the memory cell has following structures. A first floating gate transistor includes a first...
2019/0115075 CONTROL CIRCUIT OF A RESISTIVE MEMORY CELL OF A MEMORY ARRAY
The present disclosure provides a control circuit of a memory array. The control circuit includes a first switch and a set termination circuit. The first...
2019/0115074 MEMORY DEVICE
The present disclosure provides a control circuit of a memory array. The control circuit includes a first switch and a set termination circuit. The first...
2019/0115073 APPARATUSES, MEMORIES, AND METHODS FOR ADDRESS DECODING AND SELECTING AN ACCESS LINE
Apparatuses, memories, and methods for decoding memory addresses for selecting access lines in a memory are disclosed. An example apparatus includes an address...
2019/0115072 MULTI-STATE PHASE CHANGE MEMORY DEVICE WITH VERTICAL CROSS-POINT STRUCTURE
A non-volatile memory uses phase change memory (PCM) cells in a three dimensional vertical cross-point structure, in which multiple layers of word lines run in...
2019/0115071 MULTI-STATE AND CONFINED PHASE CHANGE MEMORY WITH VERTICAL CROSS-POINT STRUCTURE
A non-volatile memory uses phase change memory (PCM) cells in a three dimensional vertical cross-point structure, in which multiple layers of word lines run in...
2019/0115070 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device includes memory cells connected to word lines and bit lines. In a verification operation, a controller applies first and second...
2019/0115069 VOLATILE MEMORY STORAGE APPARATUS AND REFRESH METHOD THEREOF
A volatile memory storage apparatus including a memory array, a refresh circuit and a pre-programmed circuit is provided. The memory array includes a plurality...
2019/0115068 DRAM AND METHOD FOR DETERMINING BINARY LOGIC USING A TEST VOLTAGE LEVEL
A dynamic random access memory (DRAM) includes a memory array and a control device. The memory array includes a refresh unit. The refresh unit includes a first...
2019/0115067 DRAM AND METHOD FOR DETERMINING BINARY LOGIC USING A TEST VOLTAGE LEVEL
A dynamic random access memory (DRAM) includes a memory array and a control device. The memory array includes a refresh unit. The refresh unit includes a first...
2019/0115066 MEMORY DEVICE HAVING VARIABLE IMPEDANCE MEMORY CELLS AND TIME-TO-TRANSITION SENSING OF DATA STORED THEREIN
The present disclosure relates to circuits, systems, and methods of operation for a memory device. In an example, a memory device includes a plurality of...
2019/0115065 Memory Systems and Methods for Improved Power Management
A memory module with multiple memory devices includes a buffer system that manages communication between a memory controller and the memory devices. Each...
2019/0115064 APPARATUSES AND METHODS FOR PERFORMING AN EXCLUSIVE OR OPERATION USING SENSING CIRCUITRY
The present disclosure includes apparatuses and methods related to determining an XOR value in memory. An example method can include performing a NAND...
2019/0115063 APPARATUSES AND METHODS FOR IN-MEMORY OPERATIONS
The present disclosure includes apparatuses and methods for in-memory operations. An example apparatus includes a memory device including a plurality of...
2019/0115062 REFRESH IN NON-VOLATILE MEMORY
The present disclosure includes apparatuses and methods related to refresh in memory. An example apparatus can refresh a memory cell of an array of memory...
2019/0115061 MEMORY DEVICE AND REFERENCE CIRCUIT THEREOF
A device includes memory cells, a first reference switch, a second reference switch, a first reference storage unit, a second reference storage unit, and an...
2019/0115060 PERPENDICULAR MAGNETIC MEMORY USING SPIN-ORBIT TORQUE
Spin-orbit-torque (SOT) control strip lines are provided along the sides of free layers in perpendicular magnetic tunnel junction devices. Current flowing...
2019/0115059 HIGH PERFORMANCE, NON-VOLATILE MEMORY MODULE
Memory controllers, devices, modules, systems and associated methods are disclosed. In one embodiment, a memory module includes a pin interface for coupling to...
2019/0115058 APPARATUS AND METHOD OF CLOCK SHAPING FOR MEMORY
A memory circuit according to some examples may include a clock delay circuit that use a polarity of a write enable signal to determine an operation (i.e....
2019/0115057 APPARATUSES AND METHODS FOR PROVIDING MULTIPHASE CLOCK SIGNALS
Apparatuses and methods for providing multiphase clock signals are described. An example apparatus includes first, second, third and fourth clocked inverters,...
2019/0115056 DUAL RAIL MEMORY, MEMORY MACRO AND ASSOCIATED HYBRID POWER SUPPLY METHOD
A dual rail memory operable at a first voltage and a second voltage is disclosed. The dual rail memory includes: a memory array operates at the first voltage;...
2019/0115055 INPUT BUFFER CIRCUIT
Apparatuses for receiving an input signal in a semiconductor device are described. An example apparatus includes: a first amplifier that provides first and...
2019/0115054 DEVICES AND METHODS FOR ACCESSING RESISTIVE CHANGE ELEMENTS IN RESISTIVE CHANGE ELEMENT ARRAYS
Devices and methods for accessing resistive change elements in a resistive change element array to determine resistive states of the resistive change elements...
2019/0115053 MEMORY MODULES, METHODS OF OPERATING THE MEMORY MODULES, AND TEST SYSTEMS OF THE MEMORY MODULES
A memory module includes semiconductor memory devices, a power management integrated circuit (PMIC), and a control device. The semiconductor memory devices,...
2019/0115052 MEMORY CHIP, PACKAGE DEVICE HAVING THE SAME, AND OPERATING METHOD THEREOF
Provided herein may be a memory chip, a package device having the memory chip, and a method of operating the package device. The memory chip comprising a...
2019/0115051 ELECTRONIC DEVICE
An electronic device includes a housing having a first opening, an electric component in the housing, and a circuit board attached to the housing having an...
2019/0115050 RECORDING AND REPRODUCING APPARATUS AND METHOD THEREOF
In a recording and reproducing apparatus and a recording and reproducing method for the recording and reproducing apparatus for recording and reproducing image...
2019/0115049 RECORDING DEVICE AND RECORDING METHOD
A recording device includes a receiver, a recorder, and first and second selectors. The receiver is to be connected to a vehicle exterior imaging device and a...
2019/0115048 CLOCK SYNCHRONIZATION FOR PLAYBACK OF MULTIMEDIA FILES
A clock synchronizing system and method for playback of a multimedia file is provided. A first device receives the multimedia file that includes at least an...
2019/0115047 MAGNETIC RECORDING AND REPRODUCING DEVICE
According to one embodiment, a magnetic recording head includes a magnetic pole, a stacked body, and a first non-magnetic layer. The stacked body includes a...
2019/0115046 ROBUSTNESS OF SPEECH PROCESSING SYSTEM AGAINST ULTRASOUND AND DOLPHIN ATTACKS
A method for improving the robustness of a speech processing system having at least one speech processing module comprises: receiving an input sound signal...
2019/0115045 AUDIO ACTIVITY TRACKING AND SUMMARIES
Various embodiments provide systems and methods which disclose a device which may be used to determine an audio event based on receiving an audio signal. Based...
2019/0115044 METHOD AND DEVICE FOR AUDIO RECOGNITION
A method for audio recognition comprises: dividing audio data to be recognized to obtain a plurality of frames of audio data; calculating, based on audio...
2019/0115043 SOUND SOURCE SEPARATION METHOD AND SOUND SOURCE SEPARATION APPARATUS
There is provided a sound source separation method of carrying out sound source separation of an audio signal inputted from an input device by using a modeled...
2019/0115042 SYSTEM FOR ROBOT TO ELIMINATE OWN SOUND SOURCE
Provided is a system for a robot to eliminate its own sound source, comprising a sound pickup unit (1) used for acquiring a digital signal having mixed left...
2019/0115041 HEARING SYSTEM
The present disclosure regards a hearing device configured to receive acoustical sound signals and to generate output sound signals comprising spatial cues.
2019/0115040 ECHO CANCELLATION AND SUPPRESSION IN ELECTRONIC DEVICE
A method includes obtaining, by a processor, an audio echo signal and an audio desired signal from an acoustic echo correction stage of an electronic device,...
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