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Patent # Description
2019/0114280 LOGIC COMPONENT SWITCH
The present disclosure relates generally to semiconductor memory and methods, and more particularly, to apparatuses, and methods for controlling logic die...
2019/0114279 SCALABLE STORAGE BOX
Various examples of the present technology provide a cluster-architecture to support a scalable pooled-NVMe storage box that can be shared among a scalable...
2019/0114278 SYSTEM AND METHOD FOR SUPPORTING MULTI-PATH AND/OR MULTI-MODE NMVE OVER FABRICS DEVICES
A system includes a fabric switch including a motherboard, a baseboard management controller (BMC), a network switch configured to transport network signals,...
2019/0114277 ELECTRONIC DEVICE AND METHOD OF AUTO SWITCHING LINKING PATH GIVING PRIORITY TO A PRIORITY PORT
An electronic device includes a priority port, an initial port, a system unit a linking control circuit and a priority detection circuit. The linking control...
2019/0114276 UNIFORM PERFORMANCE MONITOR FOR A DATA STORAGE DEVICE AND METHOD OF OPERATION
An apparatus includes a first interface configured to receive a first message from a host device or from a data storage device. The apparatus further includes...
2019/0114275 NODE CONTROLLER TO MANAGE ACCESS TO REMOTE MEMORY
A node controller to manage access to and provide responses from a remote memory for a plurality of processor nodes. A learning block monitors requests to a...
2019/0114274 DYNAMIC DEFINITION OF SLAVE ADDRESS IN I2C PROTOCOL
A system includes a multi-conductor bus, a master device coupled to the multi-conductor bus, and at least one slave device coupled to the multi-conductor bus....
2019/0114273 Method of Using a Chip Identification Device
A method of using a chip identification device is jointly performed by a chip mass-produced by a semiconductor manufacturing process, a first chip manufacturer...
2019/0114271 COORDINATING MEMORY OPERATIONS USING MEMORY-DEVICE GENERATED REFERENCE SIGNALS
A memory system includes a memory controller coupled to multiple memory devices. Each memory device includes an oscillator that generates an internal reference...
2019/0114270 STORAGE SYSTEM AND METHOD OF STORAGE SYSTEM FOR CONSTRUCTING SYSTEM
Each of one or more storage device units has a switch device for relaying communication in accordance with a communication interface in which the number of...
2019/0114269 SYSTEM AND METHOD FOR REMOTE SET-UP AND ADJUSTMENT OF PERIPHERALS
A system and process of adjusting units coupled to a control element which includes, installing the unit at a selected location. A parameter can be entered...
2019/0114268 SYSTEM LEVEL INTEGRATED CIRCUIT CHIP
The present application discloses a system level integrated circuit chip, comprising a fixed logic module and a Programmable Logic Module; the fixed logic...
2019/0114267 Memory Sharing Via a Unified Memory Architecture
A method and system for sharing memory between a central processing unit (CPU) and a graphics processing unit (GPU) of a computing device are disclosed herein....
2019/0114266 SYSTEM AND METHODS EXCHANGING DATA BETWEEN PROCESSORS THROUGH CONCURRENT SHARED MEMORY
A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a...
2019/0114265 ISA EXTENSION FOR HIGH-BANDWIDTH MEMORY
A method of processing in-memory commands in a high-bandwidth memory (HBM) system includes sending a function-in-HBM instruction to the HBM by a HBM memory...
2019/0114264 MEMORY SYSTEM
A memory system includes: a memory module including: a first memory device including a first memory and a first memory controller suitable for controlling the...
2019/0114263 ZERO LATENCY PREFETCHING IN CACHES
This invention involves a cache system in a digital data processing apparatus including: a central processing unit core; a level one instruction cache; and a...
2019/0114262 CACHE STASHING IN A DATA PROCESSING SYSTEM
A data processing system and a method of data processing are provided. The system comprises a first data processing agent, a second data processing agent, and...
2019/0114261 CACHING FOR HETEROGENEOUS PROCESSORS
A multi-core processor providing heterogeneous processor cores and a shared cache is presented.
2019/0114260 SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR ACCELERATING ITERATIVE GRAPH ALGORITHMS BY MEMORY LAYOUT...
An iterative graph algorithm accelerating method, system, and computer program product, include recording an order of access nodes in a memory layout,...
2019/0114259 VIRTUALLY ADDRESSABLE HARDWARE GLOBAL KERNEL SEGMENT TABLE
Systems, methods, and computer program products to manage an address translation in a virtually segmented memory system, with included processes comprising a...
2019/0114258 STORAGE CONTROL APPARATUS AND METHOD OF CONTROLLING GARBAGE COLLECTION
A storage control apparatus that controls a plurality of storage devices, each of which includes a plurality of storage groups, the storage control apparatus...
2019/0114257 NAMESPACE PLANNING OF NON-VOLATILE MEMORY OF DATA STORAGE DEVICE
Namespace planning of non-volatile memory that takes advantage of multi-channel accessing and considers multi-channel properties is provided. A data storage...
2019/0114256 LOGICAL MEMORY UNIT FOR FLASH MEMORY
The disclosure concerns a flash memory interface having a memory management unit including a comparator configured to determine whether an address of a flash...
2019/0114255 Handling of Unaligned Sequential Writes
Storage devices, and methods for use therewith, are described herein. Such storage devices can include flash memory, random access memory (RAM), and a memory...
2019/0114254 Virtualization of Multiple Coprocessor Memory
At least one application runs on a hardware platform that includes a plurality of coprocessors, each of which has a respective internal memory space. An...
2019/0114253 CONCURRENCY TESTING
Techniques are disclosed relating to testing application code. A computer system, in various embodiments, receives application code to be tested by the...
2019/0114252 CODE COVERAGE TESTING UTILIZING TEST-TO-FILE MAPS
In some examples, a method may include receiving, by a system comprising a processor, for a first invocation of a first test of a plurality of code coverage...
2019/0114251 SOFTWARE PROOF-OF-CONCEPT PLATFORM, INCLUDING SIMULATION OF PRODUCTION BEHAVIOR AND/OR DATA
A system comprising a platform configured for communicating with enterprise end-users and for allowing the enterprise end-users to perform proof-of-concept...
2019/0114250 SYSTEMS, PROCESSES, INTERFACES, AND COMPUTER PROGRAM PRODUCTS FOR VERIFICATION OF IMAGE CONTENT IN SOFTWARE...
A system provides verification of image content in software modules within a system of software under development. Embodiments retrieve image data from a...
2019/0114249 METHOD OF EXECUTING INSTRUCTIONS OF CORE, METHOD OF DEBUGGING CORE SYSTEM, AND CORE SYSTEM
A method of executing an instruction of a core includes calling a first function; calling a second function in the first function; and updating a path...
2019/0114248 DEFEATING DEADLOCKS IN PRODUCTION SOFTWARE
The techniques described herein may provide deadlock detection and prevention with improved performance and reduced overhead over existing systems. For...
2019/0114247 SYSTEM AND METHOD FOR GRAPH BASED MONITORING AND MANAGEMENT OF DISTRIBUTED SYSTEMS
Systems, methods, and computer-readable media are disclosed for graph based monitoring and management of network components of a distributed streaming system....
2019/0114246 METHOD FOR REPLICATING PRODUCTION BEHAVIOURS IN A DEVELOPMENT ENVIRONMENT
A method is described for diagnosing errors within a production environment software platform that is arranged to process transaction messages and to store...
2019/0114245 ADAPTIVE SAMPLING TO BUILD ACCURATE APPLICATION THROUGHPUT MODELS
In one embodiment, a node in a network reports, to a supervisory service, histograms of application-specific throughput metrics measured from the network. The...
2019/0114244 Correlation-Based Analytic For Time-Series Data
Techniques are described for modeling variations in correlation to facilitate analytic operations. In one or more embodiments, at least one computing device...
2019/0114243 HARDWARE LOCKSTEP CHECKING WITHIN A FAULT DETECTION INTERVAL IN A SYSTEM ON CHIP
A method to check for redundancy in two or more data lines comprises receiving data on a first data line, computing a first cyclic redundancy check (CRC) value...
2019/0114242 USB-TESTING METHOD AND TESTING FIXTURE BOARD FOR USB DEVICE
A universal serial bus (USB) testing method includes selecting a selected test mode from test modes, creating a USB communication link between a USB device and...
2019/0114241 RECOVERING STRANDED DATA
A node for a computing system may include a memory module, a main node processor and a management processor. The memory module may include a non-volatile...
2019/0114240 RESOURCE MANAGEMENT APPARATUS, RESOURCE MANAGEMENT METHOD, AND NONVOLATILE RECORDING MEDIUM
A storage apparatus includes a plurality of resources including a plurality of types of surplus resources, determines a surplus resource introduction plan used...
2019/0114239 MEMORY SYSTEM AND METHOD FOR OPERATING THE SAME
There are provided a memory system and a method for operating the same. A memory system includes: a controller for queuing a plurality of commands and...
2019/0114238 SPANNED RAID WITH NESTED PARITY
In accordance with embodiments of the present disclosure, a method may be implemented to respond to receiving data A to be stored in a storage system that...
2019/0114237 AGENTS TO AUTONOMOUSLY DETECT CORRUPTION OR FAILURE OF NETWORK NAMESPACES
Example implementations relate to network namespaces. The multiple network namespaces host a set of virtual machines, with each network namespace being...
2019/0114236 FAULT TOLERANT NETWORK ON-CHIP
A network on-chip may include a master circuit that outputs write data or receives read data, a slave circuit that stores the write data or outputs the read...
2019/0114235 Fault Tolerant Clock Monitor System
A clock monitor includes a test clock input, as a reference clock input, another clock input, a measurement circuit, and control logic. The measurement circuit...
2019/0114234 RANDOMIZED TESTING WITHIN TRANSACTIONAL EXECUTION
Task specific diagnostic controls are provided to facilitate the debugging of certain types of abort conditions. The diagnostic controls may be set to cause...
2019/0114233 SYSTEMS AND METHODS FOR QUORUM-BASED DATA RECOVERY
The present disclosure includes systems and methods for quorum-based data recovery, in which data is recovered provided at least a minimum number of quorum...
2019/0114232 LOCAL AND OFFLOADED SNAPSHOTS FOR VOLATILE MEMORY
Embodiments describe snapshot generation and retrieval for volatile memory utilizing remote storage targets. One embodiment comprises an apparatus that...
2019/0114231 IMAGE RESTORE FROM INCREMENTAL BACKUP
Systems and methods for backing up and restoring virtual machines in a cluster environment. An instrumentation interface enables configuration data to be...
2019/0114230 EFFICIENT DISASTER ROLLBACK ACROSS HETEROGENEOUS STORAGE SYSTEMS
Systems for storage system rollover and rollback. A data mover agent is installed on a source storage system to capture disaster recovery data and send to a...
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