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Patent # Description
2019/0140106 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF
A thin film transistor including a flexible substrate, a semiconductor layer, a first gate, and a first gate dielectric layer is provided. The semiconductor...
2019/0140105 STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE WITH NANOWIRE
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a substrate including a first...
2019/0140104 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
Provided are a semiconductor device and a method for manufacturing the same, the device including a channel layer including an oxide semiconductor containing...
2019/0140102 THIN FILM TRANSISTOR, DISPLAY DEVICE, AND THIN FILM TRANSISTOR MANUFACTURING METHOD
Provided are a thin film transistor, a display device, and a thin film transistor manufacturing method, in which variation in characteristics is small. The...
2019/0140101 THIN-FILM TRANSISTOR HAVING HYDROGEN-BLOCKING LAYER AND DISPLAY APPARATUS INCLUDING THE SAME
A thin-film transistor is disclosed. The thin-film transistor includes an oxide semiconductor layer disposed on a substrate, a gate electrode disposed so as to...
2019/0140100 THIN FILM TRANSISTOR AND DISPLAY DEVICE
The disclosure discloses a thin film transistor and a display panel. The thin film transistor includes a gate, a source, a drain, an active layer, and a heat...
2019/0140099 SPLIT GATE NON-VOLATILE MEMORY (NVM) WITH IMPROVED PROGRAMMING EFFICIENCY
Device and method of forming a non-volatile memory (NVM) device are disclosed. The NVM device includes NVM cells disposed on a substrate in a device region....
2019/0140098 REPLACEMENT METAL GATE STRUCTURES
Replacement metal gate structures with improved chamfered workfunction metal and self-aligned contact and methods of manufacture are provided. The method...
2019/0140097 Method and Structure for FinFET Devices
A method includes providing a semiconductor substrate having first and second regions that are doped with first and second dopants respectively. The first and...
2019/0140096 TRANSISTOR DEVICE AND SEMICONDUCTOR LAYOUT STRUCTURE
The present disclosure provides a transistor device and a semiconductor layout structure. The transistor device includes a substrate including at least one...
2019/0140095 SEMICONDUCTOR DEVICE
A semiconductor device includes: an active area including a drift layer of a first conductivity type; and a voltage blocking area arranged around the active...
2019/0140094 SWITCHING DEVICE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a switching device may include: forming a plurality of trenches in an upper surface of a semiconductor substrate, the plurality of...
2019/0140093 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
This semiconductor device includes: an n-type SiC drift layer; a p-type base region; an n-type source region selectively embedded in the top part of the base...
2019/0140092 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
A silicon carbide semiconductor device includes: a drift region of a first conductivity type; a base region of a second conductivity type disposed on the drift...
2019/0140091 INSULATED-GATE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
An insulated-gate semiconductor device includes: an n.sup.+-type current spreading layer disposed on an n.sup.--type drift layer; a p-type base region disposed...
2019/0140090 UNIFORM FIN DIMENSIONS USING FIN CUT HARDMASK
A semiconductor device includes a substrate, a fin region including fins formed from the substrate, at least one fin cut region formed in the substrate...
2019/0140089 Source/Drain Junction Formation
A method includes forming a first channel region and a first gate structure formed over the first channel region. A first source/drain region is formed...
2019/0140088 NITRIDE POWER TRANSISTOR AND MANUFACTURING METHOD THEREOF
A nitride power transistor comprises: a silicon substrate comprising a differently doped semiconductor composite structure for forming a space charge depletion...
2019/0140087 Microwave Transistor with a Patterned Gate Structure and Manufacturing Method Thereof
A microwave transistor has a patterned region between a source and a drain on a barrier layer. Within the patterned region, the surface of the barrier layer...
2019/0140086 SEMICONDUCTOR DEVICE
A semiconductor device is provided with, a group-III nitride semiconductor layered structure that includes a heterojunction, an insulating layer which has a...
2019/0140085 SEMICONDUCTOR DEVICE
A semiconductor device includes a third electrode between a first semiconductor region and a second electrode, a fourth electrode between the first...
2019/0140084 SEMICONDUCTOR DEVICE
In an edge termination region, in a carrier drawing region between an active region and a gate runner part, a p.sup.+-type contact region is provided in a...
2019/0140083 BIPOLAR JUNCTION TRANSISTOR AND METHOD FOR FABRICATING THE SAME
A method for fabricating bipolar junction transistor (BJT) includes the steps of: providing a substrate having an emitter region, a base region, and a...
2019/0140082 SEMICONDUCTOR DEVICES, FINFET DEVICES AND METHODS OF FORMING THE SAME
Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate and a gate structure...
2019/0140081 TFT SUBSTRATE AND MANUFACTURING METHOD THEREOF
A TFT substrate and manufacturing method thereof are provided. The method of manufacturing TFT substrate comprises providing a substrate, preparing a flexible...
2019/0140080 FABRICATION OF VERTICAL FIELD EFFECT TRANSISTORS WITH SELF-ALIGNED BOTTOM INSULATING SPACERS
A vertical field-effect transistor (FET) device is fabricated with a self-aligned bottom insulating spacer for improved electrostatic control. A semiconductor...
2019/0140079 SEMICONDUCTOR DEVICE WITH IMPROVED NARROW WIDTH EFFECT AND METHOD OF MAKING THEREOF
A device and a method for forming a device are disclosed. The method includes providing a substrate prepared with a device region. A device well having second...
2019/0140078 FORMING AN UNIFORM L-SHAPED INNER SPACER FOR A VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTOR (VT FINFET)
A method of forming a vertical transport fin field effect transistor (VT FinFET), including, forming a plurality of vertical fins on a substrate, forming a...
2019/0140077 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating semiconductor device includes the steps of first forming a gate structure on a substrate, forming a contact etch stop layer (CESL) on...
2019/0140076 FinFETs and Methods of Forming the Same
A method includes forming a dummy gate stack on a substrate, forming a spacer layer on the dummy gate stack, forming an etch stop layer over the spacer layer...
2019/0140075 FinFET With a Semiconductor Strip as a Base
A method includes forming a first hard mask over a semiconductor substrate, etching the semiconductor substrate to form recesses, with a semiconductor strip...
2019/0140074 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A manufacturing method of a semiconductor device includes the following steps. A first stacked structure and a second stacked structure are formed on a core...
2019/0140073 QUANTUM DOT DEVICES WITH PATTERNED GATES
Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include:...
2019/0140072 HETEROJUNCTION BIPOLAR TRANSISTOR WITH COUNTER-DOPED COLLECTOR REGION AND METHOD OF MAKING SAME
A bipolar transistor is supported by a single-crystal silicon substrate including a collector connection region. A first epitaxial region forms a collector...
2019/0140071 HIGH VOLTAGE SCHOTTKY DIODE AND MANUFACTURING METHOD THEREOF
The present invention discloses a Schottky diode. The Schottky diode comprises a substrate having a device well. A drift region is disposed within the device...
2019/0140070 Semiconductor Device and Manufacturing Method Thereof
A semiconductor device includes a substrate, at least one active semiconductor fin, at least one first dummy semiconductor fin, and at least one second dummy...
2019/0140069 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a plurality of gate structures, a...
2019/0140068 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A semiconductor device includes a metal gate on a substrate, a polysilicon layer on the metal gate, a hard mask on the polysilicon layer, and a source/drain...
2019/0140067 NbMC LAYERS
Methods of forming thin-film structures including one or more NbMC layers, and structures and devices including the one or more NbMC layers are disclosed. The...
2019/0140066 INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided are an integrated circuit device and a method of manufacturing the same. The integrated circuit device includes: a semiconductor substrate; a device...
2019/0140065 n-Type Electrode, Method for Manufacturing n-Type Electrode, and n-Type Laminated Structure wherein n-Type...
An n-type electrode includes a first electrode layer to be formed on an n-type group III nitride single crystal layer and a second electrode layer formed on...
2019/0140064 TRANSISTOR WITH ASYMMETRIC SPACERS
A field-effect transistor device including an asymmetric spacer assembly allows lower parasitic capacitance on the drain side of the device and lower...
2019/0140063 SEMICONDUCTOR STRUCTURE FOR MEMORY DEVICE AND METHOD FOR FORMING THE SAME
A semiconductor device includes a substrate, a gate structure disposed over the substrate, a drain structure disposed in the substrate, and a source structure...
2019/0140062 FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE WITH DUAL SPACERS AND METHOD FOR FORMING THE SAME
A FinFET device structure is provided. The FinFET device structure includes a first gate structure formed over a fin structure and a first spacer layer formed...
2019/0140061 BROKEN BANDGAP CONTACT
An interlayer film is deposited on a device layer on a substrate. A contact layer is deposited on the interlayer film. The interlayer film has a broken bandgap...
2019/0140060 AN APPARATUS AND METHOD COMPRISING TWO DIMENSIONAL MATERIAL
An apparatus and method, the apparatus comprising: at least one electrode configured to provide an electrical connection to a channel of two dimensional...
2019/0140059 Semiconductor Devices Having Field Electrode Trenches
A semiconductor device includes needle-shaped trenches in a semiconductor substrate, each of which includes a field electrode electrically insulated from the...
2019/0140058 SEMICONDUCTOR DEVICE
A semiconductor device including: a semiconductor substrate having a drift region of the first conductivity type; a cathode region formed on the lower surface...
2019/0140057 FIELD-EFFECT-TRANSISTORS
A field-effect-transistor includes forming a fin structure on a substrate, a gate structure formed across each fin structure and covering a portion of top and...
2019/0140056 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
A silicon carbide layer includes a drift region, a body region and a source region. The drift region constitutes a first main surface and has a first...
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