Searching:
Search by keyword, patent number, inventor, assignee, city or state:
| Patent # | Description |
|---|---|
| US-7,960,859 |
Automatic sensing power systems and methods An automatic sensing power system automatically determines a power requirement for an electrical device, converts power to the required level, and outputs the... |
| US-7,960,858 |
Device, system and method for reducing the consumption of closed-circuit
current of a motor vehicle A device for reducing the consumption of closed-circuit current of a motor vehicle includes a first line, by way of which an ignition switch and a first... |
| US-7,960,857 |
System and method for vehicle based uninterruptable power supply A system and method for controlling a vehicle-based source of uninterruptable power is disclosed. The vehicle-based UPS includes an energy storage system... |
| US-7,960,856 |
Innovative architectures for systems for generation and distribution of
energy on board motor vehicles The system allows the generation and distribution of energy on board a motor vehicle provided with a propulsion unit, a tank for fuel at least one distribution... |
| US-7,960,855 |
System and method for providing power control of an energy storage system A control circuit comprises a circuit adapted to determine a state of charge of a high side power source using a sensed output current to provide a variable... |
| US-7,960,854 |
Electrical connector configured to form coupling region in automotive
glazing An automotive glazing having a non-galvanic contact for an electrical device associated with the glazing is disclosed. The glazing comprises a first ply and a... |
| US-7,960,853 |
Switch-based door and ramp interface system An interface system prevents operational interference between a vehicle power door and a ramp of an access system by interrupting power to the motors and... |
| US-7,960,852 |
Fluid turbine devices and methods related to fluid turbine devices Fluid turbine devices and methods related to fluid turbine devices are disclosed herein. One example method includes deflecting a first portion of a fluid flow... |
| US-7,960,851 |
Power generator and method for generating power A power generator for use in a unidirectional flowing fluid has a fixed part and a movable part, the movable part is mounted on the fixed part for reciprocal... |
| US-7,960,850 |
Priority system for communication in a system of at least two distributed
wind turbines The invention relates to a system of at least two distributed wind turbines where the at least two wind turbines communicate via a data communication network,... |
| US-7,960,849 |
Method and system of control of the converter of an electricity generation
facility connected to an electricity... Method and system of control of the converter of an electricity generation facility of the type which comprises at least one electric generator, such as a wind... |
| US-7,960,848 |
Electric bike with capability of self-charging The present invention provides an electric bike with capability of self-charging. The electric bike is fixedly supported by supporting legs so as to be operated... |
| US-7,960,847 |
Packaging structure of SIP and a manufacturing method thereof A manufacturing method for a packaging structure of SIP (system in package) includes the following steps. First step is providing a substrate having electronic... |
| US-7,960,846 |
Semiconductor device having improved solder joint and internal lead
lifetimes A semiconductor chip is mounted on a flexible wiring board through the interposition of an elastomer. The flexible wiring board is made up of a tape on which... |
| US-7,960,845 |
Flexible contactless wire bonding structure and methodology for
semiconductor device A semiconductor device such as a field-effect transistor, improved to reduce device resistance, comprises a leadframe which includes a die paddle integral with... |
| US-7,960,844 |
3-dimensional flash memory device, method of fabrication and method of
operation Disclosed are a flash memory device and method of operation. The flash memory device includes a bottom memory cell array and a top memory cell array disposed... |
| US-7,960,843 |
Chip arrangement and method of manufacturing a chip arrangement A chip arrangement includes a logic chip with electric contacts arranged on one side, at least one memory chip arrangement with electrical contacts arranged on... |
| US-7,960,842 |
Structure of high performance combo chip and processing method A method for fabricating a chip package is achieved. A seed layer is formed over a silicon wafer. A photoresist layer is formed on the seed layer, an opening in... |
| US-7,960,841 |
Through-hole via on saw streets A semiconductor device is manufactured by, first, providing a wafer designated with a saw street guide. The wafer is taped with a dicing tape. The wafer is... |
| US-7,960,840 |
Double wafer carrier process for creating integrated circuit die with
through-silicon vias and... A TSV-MEMS packaging process is provided. The process includes forming TSVs in the front side of the product wafer, and attaching a first carrier to the front... |
| US-7,960,839 |
Semiconductor interconnection line and method of forming the same An interconnection line of a semiconductor device and a method of forming the same using a dual damascene process are disclosed. An example interconnection line... |
| US-7,960,838 |
Interconnect structure An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a dielectric layer, a composite plug and a... |
| US-7,960,837 |
Semiconductor package In a semiconductor package, at least two of connection pads are formed into different-shape pads which are different in planar shape from other connection pads,... |
| US-7,960,836 |
Redundant micro-loop structure for use in an integrated circuit physical
design process and method of forming... An integrated circuit including a first wire of a first level of wiring tracks, a second wire of a second level of wiring tracks, a third wire of a third level... |
| US-7,960,835 |
Fabrication of metal film stacks having improved bottom critical dimension A method of fabricating metal film stacks is described that reduces or eliminates adverse effects of photolithographic misalignments. A bottom critical... |
| US-7,960,834 |
Electronic element that includes multilayered bonding interface between
first electrode having... An electronic element including an electronic element base and electrodes each of which has a first electrode having a surface composed of at least Al or an Al... |
| US-7,960,833 |
Integrated circuits and interconnect structure for integrated circuits An integrated circuit comprises N plane-like metal layers, where N is an integer greater than one. A first plane-like metal layer includes M contact portions... |
| US-7,960,832 |
Integrated circuit arrangement with layer stack An integrated circuit arrangement includes an electrically conductive conduction structure made from copper or a copper alloy. At a side wall of the conduction... |
| US-7,960,831 |
Ball-limiting metallurgies, solder bump compositions used therewith,
packages assembled thereby, and methods of... A ball-limiting metallurgy (BLM) stack is provided for an electrical device. The BLM stack resists tin migration toward the metallization of the device. A... |
| US-7,960,830 |
Electronic assembly having a multilayer adhesive structure An electronic assembly comprising a first substrate, a number of bonds on the first substrate, a second substrate spaced apart from the first substrate, a... |
| US-7,960,829 |
Support structure for use in thinning semiconductor substrates and for
supporting thinned semiconductor substrates A support structure for use with a semiconductor substrate in thinning, or backgrinding, thereof, as well as during post-thinning processing of the... |
| US-7,960,828 |
Carrier frame for electronic components and production method for
electronic components The carrier frame relating to the present invention comprises a base layer member, a frame layer member, and a positioning layer member having multiple openings... |
| US-7,960,827 |
Thermal via heat spreader package and method A thermal via heat spreader package includes an electronic component having an active surface including a nonfunctional region. A package body encloses the... |
| US-7,960,826 |
Dielectric layer structure A dielectric layer structure includes an interlayer dielectric (ILD) layer covering at least a metal interconnect structure and a single tensile hydrophobic... |
| US-7,960,825 |
Chip package and method for fabricating the same A method for fabricating chip package includes providing a semiconductor chip with a bonding pad, comprising an adhesion/barrier layer, connected to a pad... |
| US-7,960,824 |
Semiconductor device including power supply pad and trunk wiring which are
arranged at the same layer level A semiconductor device includes a semiconductor substrate which includes a functional circuit, a trunk wiring which passes through a portion near a position... |
| US-7,960,823 |
Semiconductor device with different sized ESD protection elements A semiconductor device of an aspect of the present invention comprises a package substrate, one first power supply terminal provided on the package substrate,... |
| US-7,960,822 |
Package on package substrate A package on package substrate is disclosed. The package on package substrate in accordance with an embodiment of the present invention can include a bottom... |
| US-7,960,821 |
Dummy vias for damascene process An integrated circuit device and method of making the integrated circuit device are disclosed. An exemplary apparatus includes: a semiconductor layer; and a... |
| US-7,960,820 |
Semiconductor package A semiconductor package in which an electronic device chip is provided in a cavity of a silicon substrate stacked product constituted by stacking a plurality of... |
| US-7,960,819 |
Leadframe-based packages for solid state emitting devices A modular package for a light emitting device includes a leadframe having a top surface and including a central region having a bottom surface and having a... |
| US-7,960,818 |
Conformal shield on punch QFN semiconductor package In accordance with the present invention, there is provided a punch quad flat no leads (QFN) semiconductor package including a leadframe wherein the leads of... |
| US-7,960,817 |
Semiconductor power module with flexible circuit leadframe A semiconductor power module includes a semiconductor chip thermally interfaced to a ceramic substrate and a leadframe defined by a flexible circuit disposed... |
| US-7,960,816 |
Semiconductor package with passive device integration A system is provided for an integrated circuit package including a leadframe with a lead finger. A groove is in a lead finger for a conductive bonding agent and... |
| US-7,960,815 |
Leadframe design for QFN package with top terminal leads A semiconductor package includes a leadframe. A first lead finger has a lower portion, a connecting portion extending vertically upward from the lower portion,... |
| US-7,960,814 |
Stress relief of a semiconductor device A semiconductor device includes a die including an active region, a scribe region, and a perimeter, wherein the scribe region is closer to the perimeter than... |
| US-7,960,813 |
Programmable resistance memory devices and systems using the same and
methods of forming the same A programmable resistance memory element and method of forming the same. The memory element includes a first electrode, a dielectric layer over the first... |
| US-7,960,812 |
Electrical devices having adjustable capacitance Electrical devices having tunable capacitance are provided. The tunable capacitance is achieved by placing an appropriate material between substrate layers and... |
| US-7,960,811 |
Semiconductor devices and methods of manufacture thereof Capacitor plates, capacitors, semiconductor devices, and methods of manufacture thereof are disclosed. In one embodiment, a capacitor plate includes at least... |
| US-7,960,810 |
Semiconductor device with reliable high-voltage gate oxide and method of
manufacture thereof A semiconductor device including a capacitor and a proximate high-voltage gate having a boron-barrier layer that ideally serves as part of both the capacitor... |
Copyright 2008−2013 Patents.com
