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Patent # Description
US-7,992,066 Method of encoding and decoding using low density parity check matrix
A method of encoding and decoding using an LDPC code is disclosed, by which encoding and decoding performance can be enhanced and which can be effectively...
US-7,992,065 Automatic scan format selection based on scan topology selection
A method for specifying a signaling protocol to be used by a controller in a group of controllers connected with shared signaling is provided in which the...
US-7,992,064 Selecting a scan topology
A controller that shares an interface with several other controllers connected in a scan topology in a target system may be selected by receiving a selection...
US-7,992,063 Control circuit for releasing residual charges
A control circuit includes a plurality of shift register stages. Each shift register stage is capable of outputting an individual output signal. The output...
US-7,992,062 Logic device and method supporting scan test
A logic device includes a data input, a scan test input, a clock demultiplexer, and a master latch. The clock demultiplexer is responsive to a clock input to...
US-7,992,061 Method for testing reliability of solid-state storage medium
A method for testing a reliability of a solid-state storage medium is provided, wherein the solid-state storage medium has a plurality of blocks. First, a...
US-7,992,060 Apparatus, methods, and system of NAND defect management
Various embodiments comprise apparatus, methods, and systems including method comprising searching for a group address among a plurality of group addresses in a...
US-7,992,059 System and method for testing a large memory area during processor design verification and validation
A system and method for replicating a memory block throughout a main memory and modifying real addresses within an address translation buffer to reference the...
US-7,992,058 Method and apparatus for loopback self testing
A system and method for loopback self testing. A system includes a host device and an endpoint device. The host device transmits unencoded test symbols. The...
US-7,992,057 Write-once type optical disc, and method and apparatus for managing defective areas on write-once type optical disc
A recording medium and a method and apparatus for managing a defective area on the recording medium are provided. The method includes detecting an existence of...
US-7,992,056 Error monitoring and notification for a replaceable unit
There is provided an information processing apparatus that includes a CPU board 1 having a processing unit, a control device (CPU 11, CPU board controller 12,...
US-7,992,055 System and method for providing autosupport for a security system
A system and method for providing autosupport functionality to a security system is provided. An event generator generates an event and passes the newly...
US-7,992,054 Automatic maintenance of a computing system in a steady state using correlation
An autonomic computing system is automatically maintained in a steady state. The system has a number of parameters, each of which has one or more threshold. The...
US-7,992,053 System for detecting pattern of events occurred in information system
A system has a plurality of information processing apparatuses, each comprising: a storage device that stores, for each occurrence pattern of events to be...
US-7,992,052 Program correlation message generation for debug
A data processing system and method includes a data processor and memory that are coupled to debug circuitry that generates debug messages including address...
US-7,992,051 Method, apparatus, and computer program product in a processor for dynamically during runtime allocating memory...
An apparatus, and computer program product are disclosed in a processor for dynamically, during runtime, allocating memory for in-memory hardware tracing. The...
US-7,992,050 Method and apparatus for checking installed and executed systems
A method and apparatus for comparing two computing platforms installed with instances of an application, a portal or another computerized unit, wherein one...
US-7,992,049 Monitoring of memory and external events
A system comprises a circuit configured to execute instructions and output event data corresponding to the execution of the instructions. The system also...
US-7,992,048 Computer system and method for performing failure detecting processing for a logical path
Provided is a computer system including at least one host computer; and at least one storage system, characterized in that: the storage system has a disk drive...
US-7,992,047 Context sensitive detection of failing I/O devices
Methods for context sensitive detection of failing I/O devices sample and record a response time of an I/O device for each of a first plurality of time...
US-7,992,046 Test system with simulation control device for testing functions of electronic devices
A test system for testing various functions of electronic devices includes a master device and a simulation control device. The master device is connected to an...
US-7,992,045 Identifying and monitoring asynchronous transactions
Monitoring asynchronous transactions in a computing environment is disclosed. A first unique identifier is determined when a first method executes. The...
US-7,992,044 Method and system for platform independent fault management
A method for fault management. The method includes generating, in firmware of a computer system, a physical resource inventory (PRI) of a plurality of hardware...
US-7,992,043 Software debugger for packets in a network on a chip
A breakpoint packet is dispatched to a Network On A Chip (NOC). The breakpoint packet instructs one or more specified nodes on the NOC to place the specified...
US-7,992,042 Debug support device, and program for directing computer to perform debugging method
A debug support device for debugging a multiprocessor configured by a plurality of unit processors a unit processor stop section realized by a plurality of the...
US-7,992,041 Peripheral device, integrated circuit for peripheral device and method for analyzing failure of peripheral device
The peripheral device through an interface cable, and includes a second memory device for storing an evaluation program for evaluating the peripheral device and...
US-7,992,040 Root cause analysis by correlating symptoms with asynchronous changes
An indication of a problem in at least one component of a computing system is obtained. A relevant change set associated with a directed dependency graph is...
US-7,992,039 Failover and load balancing
Provided are techniques for static load balancing implemented in a filter driver. The filter driver determines a data quota for each of multiple data paths. The...
US-7,992,038 Failure protection in an environment including virtualization of networked storage resources
An architecture for protecting against failure in a switched storage network using virtualization.
US-7,992,037 Scalable secondary storage systems and methods
Exemplary systems and methods in accordance with embodiments of the present invention may provide a plurality of data services by employing splittable, mergable...
US-7,992,036 Apparatus, system, and method for volume-level restoration of cluster server data
An apparatus, system, and method are disclosed for restoring cluster server data at a volume level. A setup module opens at least one source volume of a cluster...
US-7,992,035 Disk selection method, raid control device, raid system, and its disk device
A response of a disk device during rebuild can be sped up. A disk array control device determines whether or not there is a normal read request during rebuild....
US-7,992,034 Match server for a financial exchange having fault tolerant operation
Fault tolerant operation is disclosed for a primary match server of a financial exchange using an active copy-cat instance, a.k.a. backup match server, that...
US-7,992,033 System management infrastructure for corrective actions to servers with shared resources
Corrective actions are managed for differing preferences among multiple sharing customers by a repository inquirer which, responsive to receipt of a fault event...
US-7,992,032 Cluster system and failover method for cluster system
Even when a large number of guest OSs exist, a failover method meeting high availability needed by the guest OSs is provided for the each guest OS. In the event...
US-7,992,031 Automated disaster recovery planning
A system and associated method for automated disaster recovery (DR) planning. A DR planning process receives disaster recovery requirements and a target...
US-7,992,030 Fall time accelerator circuit
Embodiments of the invention address deficiencies of the art in respect to digital signal transmissions and provide a novel and non-obvious fall time...
US-7,992,029 Electronic device with temporary flag for fail safe and power cycling
An electronic device includes a flag circuit configured to generate a status flag indicating whether or not a power supply voltage to the electronic device has...
US-7,992,028 Power management for correlating difference in system power measurements with subsystem power draw
Embodiments of power management are disclosed.
US-7,992,027 Power supply device and storage control device
The power supply device of the present invention supplies power individually to a plurality of disk drives by rendering a plurality of DC/DC converters...
US-7,992,026 Controlling broadcast content processing using display state information
Controlling supplementary data channels using display state information involves processing, at a user device, a first broadcast signal having a content channel...
US-7,992,025 Power control circuit
A power control circuit for supplying power for a computer component of a computer includes first to sixth switches. In response to the computer changing to a...
US-7,992,024 Firewall/isolation cells for ultra low power products
In an integrated circuit (IC) may have several functional blocks adapted to be inactivated independently from each other. At least one firewall cell may be...
US-7,992,023 Method and system for managing peripheral connection wakeup in a processing system supporting multiple virtual...
A method and system for managing peripheral connection wakeup signaling in a processing system supporting multiple virtual machines provides a mechanism by...
US-7,992,022 Method and apparatus for setting computer-working-hours-based shutdown options
The present invention provides a method and apparatus for setting computer-working-hours-based shutdown options. A method for setting ...
US-7,992,021 Power-managed server and method for managing power consumption
A power-managed server and method for managing power consumption is disclosed. According to one embodiment, a power-managed server data processing system is...
US-7,992,020 Power management with packaged multi-die integrated circuit
Power management with a packaged multi-die integrated circuit (IC) is described. A first integrated circuit die is capable of a first operational mode. A second...
US-7,992,019 System device including NIC and power-saving controlling method of the same
The object is to realize reasonable power-saving operation in a NIC portion depending on a link status for the Ethernet in a system device including a NIC. For...
US-7,992,018 System device including NIC and power-saving controlling method of the same
The object is to realize power-saving operation in a NIC portion while maintaining a processing ability necessary for services to be performed in a system...
US-7,992,017 Methods and apparatuses for reducing step loads of processors
Methods and apparatuses for reducing step loads of processors are disclosed. Method embodiments comprise examining a number of instructions to be processed by a...
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