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Patent # Description
US-7,990,207 Constant voltage circuit, constant voltage supply system and constant voltage supply method
An input voltage signal VIN to be inputted to a gate terminal of a PMOS transistor M1 is converted to a voltage value which was level shifted at the source...
US-7,990,206 Device for supplying temperature dependent negative voltage
A negative voltage supply device includes a negative voltage detector and a negative voltage pumping unit. The negative voltage pumping unit pumps a negative...
US-7,990,205 Semiconductor integrated circuit with switching variable resistance device
A semiconductor integrated circuit having a switching variable resistance device with combined functions of a switching device and a variable resistance device...
US-7,990,204 Voltage generator that prevents latch-up
A voltage generator that prevents latch-up includes: a charge pump circuit that is controlled by first through third enable signals, boosts an internal power...
US-7,990,203 Internal voltage generation apparatus for semiconductor device
An internal voltage generation apparatus for a semiconductor device is disclosed. The internal voltage generation apparatus includes a power-up detector for...
US-7,990,202 System and method for driving bipolar transistors in switching power conversion
A system and method for driving a bipolar junction transistor is provided. The system includes a first transistor including a first gate, a first terminal, and...
US-7,990,201 Constant phase digital attenuator with on-chip matching circuitry
Various embodiments are directed to providing constant phase digital attenuation. In one embodiment, a digital attenuator circuit (100) comprises an input node...
US-7,990,200 Pulse width modulation control system
A PWM control system includes a multi-phase PWM controller and at least one single-phase PWM controller. The multi-phase PWM controller is capable of generating...
US-7,990,199 Clock gater system
A clock gater includes a first circuit configured to receive a clock signal. The first circuit includes a first subcircuit and a second subcircuit. A latch is...
US-7,990,198 Apparatus and method for generating clock signal
The invention is related to an apparatus and a method for generating an output clock. The method comprises: receiving a transmitted signal comprising at least...
US-7,990,197 Internal clock driver circuit
An internal clock signal driver circuit includes a delay block that delays a rising clock signal and a falling clock signal, and outputs a delayed rising clock...
US-7,990,196 Signal driver with first pulse boost
A driver boost signaling circuit provides a pulse boost to the first cycle of an output pulse wave applied to an associated load. The circuit includes a signal...
US-7,990,195 Duty cycle correction circuits having short locking times that are relatively insensitive to temperature changes
A duty cycle correction circuit includes a duty cycle correction portion that is configured to output a correction signal that is obtained by correcting a duty...
US-7,990,194 Apparatus and method for correcting duty cycle of clock signal
A clock correction circuit includes a delay locked loop (DLL) configured to delay an external clock signal and to generate an internal clock signal, a first...
US-7,990,193 Semiconductor integrated circuit and method of controlling the same
A semiconductor integrated circuit includes an update control unit configured to generate an update control signal in response to a first command and a second...
US-7,990,192 Phase locked loop and method for charging phase locked loop
A phase locked loop (PLL) and a method for charging the PLL are disclosed. The charge circuit includes: a threshold judging module, adapted to output a signal...
US-7,990,191 Digital phase-locked loop
A digital phase-locked loop circuit includes: a first counter which counts a first clock; a second counter which counts third clocks into which a second clock...
US-7,990,190 Power-on reset circuit, module including same, and electronic device including same
A power-on reset circuit includes a charge-up circuit to charge a first capacitor after power is on, a first NOR circuit connected to an output terminal of the...
US-7,990,189 Power-up signal generating circuit and integrated circuit using the same
A power-up signal generating circuit includes a detecting unit configured to output a bias signal having a voltage level corresponding to an external power...
US-7,990,188 Clock buffer
An apparatus is provided. The apparatus comprises a first bipolar junction transistor (BJT) differential pair having a first BJT and a second BJT, a second BJT...
US-7,990,187 Partial switch gate driver
A power switch driver includes a top driver switch, a bottom driver switch, a driver node between them, and driver logic. The power switch driver can turn on...
US-7,990,186 Signal conditioning circuit with a shared oscillator
A circuit for signal conditioning including a first stage with a digital/analog converter, a second stage with an I/Q-modulator, and at least one third stage...
US-7,990,185 Analog finite impulse response filter
According to one embodiment of the invention, a programmable finite impulse response (FIR) filter is implemented with differential isolation circuits to isolate...
US-7,990,184 Comparing device having hysteresis characteristics and voltage regulator using the same
Embodiments include a comparing device having hysteresis characteristics and a voltage regulator using the same. The voltage regulator includes a comparator...
US-7,990,183 Differential comparator with skew compensation function and test apparatus using the same
One of differential signals is inputted to a first input terminal. The other of the differential signals is inputted to a second input terminal. A first sample...
US-7,990,182 Electrical physical layer activity detector
A low-current differential signal activity detector circuit may be configured to reject large common mode signals on differential input lines, while still...
US-7,990,181 Clockless return to state domino logic gate
A clockless return to state domino logic gate is disclosed responsive to multiple input nodes including at least one return to state node. A domino circuit...
US-7,990,180 Fast dynamic register
A fast dynamic register circuit including first and second precharge circuits, a keeper circuit and an output circuit. The first and second precharge circuits...
US-7,990,179 Clock distribution circuit and layout design method using same
A layout design method in accordance with an exemplary aspect of the present invention is a layout design method for a clock tree circuit, including disposing a...
US-7,990,178 Driving circuit with impedence calibration
A driving circuit includes at least a driving unit. The driving circuit includes a first bias component, a second bias component, and four ...
US-7,990,177 Driver circuit for producing signal simulating transmission loss
In a driver circuit 10 for outputting a simulated signal simulating an input signal subjected to transmission loss, corresponding to the input signal, the...
US-7,990,176 Low power line driver and method thereof
A line driver for a communications system requiring multiple power sources for different modes of operation comprises a current source and a voltage source...
US-7,990,175 Output buffer circuit and integrated circuit including same
An output buffer circuit includes a control unit and an output driver. The control unit generates a control signal in response to a mode signal applied from an...
US-7,990,174 Circuit for calibrating impedance and semiconductor apparatus using the same
A circuit for calibrating impedance includes an enable signal generator, a code generator and a connection controller. The enable signal generator generates an...
US-7,990,173 Single event upset mitigation
A circuit for handling single event upsets includes a plurality of digital clock manager circuits. A plurality of counters are respectively coupled by their...
US-7,990,172 Method and apparatus for testing electronic device
An electronic device test method incorporating a stress application step that is effective in screening out infant mortality failures of an electronic device....
US-7,990,171 Stacked semiconductor apparatus with configurable vertical I/O
The present invention provides an apparatus including a stacked plurality of devices and a related method. The apparatus includes a stacked plurality of devices...
US-7,990,170 Electrostatic discharge withstand voltage evaluating device and electrostatic discharge withstand voltage...
In one embodiment of the present invention, an electrostatic discharge withstand voltage evaluating device includes: an application device, including a first...
US-7,990,169 Electrical testing device
An electrical testing device used for testing an electronic device under test. The electrical testing device includes a cable configured for receiving a test...
US-7,990,168 Probe card including a sub-plate with a main supporter and a sub-supporter with the sub-supporter having probe...
A probe card to connect a semiconductor device to test equipment includes a Printed Circuit Board (PCB) in which an electrical wiring pattern is formed, a first...
US-7,990,167 System and method for modulation mapping
An apparatus for providing modulation mapping is disclosed. The apparatus includes a laser source, a motion mechanism providing relative motion between the...
US-7,990,166 Testing module for testing key buttons of portable electronic device
A testing module is provided including a driving assembly, a positioning assembly and a testing head mechanism. The positioning assembly positions the driving...
US-7,990,165 Contact probe and method of making the same
To provide a contact probe which can easily be connected with a measurement apparatus electrically, can measure a high speed and high frequency signal with a...
US-7,990,164 Method of designing a probe card apparatus with desired compliance characteristics
A probe card apparatus is configured to have a desired overall amount of compliance. The compliance of the probes of the probe card apparatus is determined, and...
US-7,990,163 Systems and methods for defect testing of externally accessible integrated circuit interconnects
Apparatus and methods provide built-in testing enhancements in integrated circuits. These testing enhancements permit, for example, continuity testing to pads...
US-7,990,162 Systems and methods for an open circuit current limiter
A resistance measuring circuit includes a current generating component, a current control component, and a voltage measurement component. The magnitude of a...
US-7,990,161 Apparatus for measuring total acid number of oil and estimating lifetime of oil, and method for measuring total...
Disclosed herein are an apparatus for measuring the total acid number of oil, an apparatus for measuring the lifetime of oil through the measurement of the...
US-7,990,160 Capacitive sensing with combinatorial sensor layout
In a method for determining capacitance, a set of sensor electrodes is employed. The set of sensor electrodes comprises at least three sensor electrodes...
US-7,990,159 Potential measurement apparatus and image forming apparatus
A potential measurement apparatus for measuring a surface potential of an object of measurement detects a change in electric charge induced at a detection...
US-7,990,158 Measurement arrangement for determining the characteristic line parameters by measuring scattering parameters
The present invention relates to a measurement arrangement for determining the characteristic line parameters by measuring the S-parameters as a function of the...
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