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Patent # Description
US-7,989,905 MEMS device having a movable electrode
A microelectromechanical system (MEMS) device includes a semiconductor substrate, a MEMS including a fixed electrode and a movable electrode formed on the...
US-7,989,904 Micro-electromechanical device and manufacturing method thereof
A micro-electromechanical device includes a substrate, a first patterned conductive layer, a second patterned conductive layer and a first patterned blocking...
US-7,989,903 Semiconductor device with extension structure and method for fabricating the same
A semiconductor device includes a semiconductor region, a source region, a drain region, a source extension region a drain extension region, a first gate...
US-7,989,902 Scavenging metal stack for a high-k gate dielectric
A stack of a high-k gate dielectric and a metal gate structure includes a lower metal layer, a scavenging metal layer, and an upper metal layer. The scavenging...
US-7,989,901 MOS devices with improved source/drain regions with SiGe
A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a semiconductor substrate; a gate stack on the...
US-7,989,900 Semiconductor structure including gate electrode having laterally variable work function
A semiconductor structure, such as a CMOS structure, includes a gate electrode that has a laterally variable work function. The gate electrode that has the...
US-7,989,899 Transistor, inverter including the same and methods of manufacturing transistor and inverter
A transistor, an inverter including the transistor, and methods of manufacturing the inverter and the transistor. A gate insulating layer of the transistor has...
US-7,989,898 Method for fabricating a dual workfunction semiconductor device and the device made thereof
A dual workfunction semiconductor device and a device made thereof is disclosed. In one aspect, the device includes a first gate stack in a first region and a...
US-7,989,897 Semiconductor device
A semiconductor device includes a first MISFET and a second MISFET which are formed over a semiconductor substrate and have the same conductive type. The first...
US-7,989,896 Semiconductor device and method of fabricating the same
A method of fabricating a semiconductor device according to one embodiment includes: laying out a first region, a second region, a third region and a fourth...
US-7,989,895 Integration using package stacking with multi-layer organic substrates
Example embodiments of the invention may provide for a multi-package system. The multi-package system may include a first package having a plurality of first...
US-7,989,894 Fusion bonding process and structure for fabricating silicon-on-insulation (SOI) semiconductor devices
A method of fabricating a semiconductor-on-insulator device including: providing a first semiconductor wafer having an about 500 angstrom thick oxide layer...
US-7,989,893 SOI body contact using E-DRAM technology
A semiconductor structure is disclosed. The semiconductor structure includes an active semiconductor layer, a semiconductor device having a gate disposed on top...
US-7,989,892 Gate structure, and semiconductor device having a gate structure
A gate structure can include a polysilicon layer, a metal layer on the polysilicon layer, a metal silicide nitride layer on the metal layer and a silicon...
US-7,989,891 MOS structures with remote contacts and methods for fabricating the same
MOS structures with remote contacts and methods for fabricating such MOS structures are provided. In one embodiment, a method for fabricating an MOS structure...
US-7,989,890 Lateral power MOSFET with high breakdown voltage and low on-resistance
A semiconductor structure includes a semiconductor substrate of a first conductivity type; a pre-high-voltage well (pre-HVW) in the semiconductor substrate,...
US-7,989,889 Integrated lateral high-voltage metal oxide semiconductor field effect transistor
The present invention relates to integration of a lateral high-voltage metal oxide semiconductor field effect transistor (LHV-MOSFET) with other circuitry on a...
US-7,989,888 Semiconductor device with a field stop zone and process of producing the same
Embodiments discussed herein relate to processes of producing a field stop zone within a semiconductor substrate by implanting dopant atoms into the substrate...
US-7,989,887 Trench MOSFET with trenched floating gates as termination
A trench MOSFET comprising a plurality of transistor cells with a plurality of wide trenched floating gates as termination region is disclosed. The trenched...
US-7,989,886 Alignment of trench for MOS
Manufacturing a power transistor by forming a gate structure on a first layer, forming a trench in the first layer, self aligned with the gate structure, and...
US-7,989,885 Semiconductor device having means for diverting short circuit current arranged in trench and method for...
A semiconductor device has a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type complementary...
US-7,989,884 Structure for making a top-side contact to a substrate
A semiconductor structure includes a starting semiconductor substrate having a recessed portion. A semiconductor material is formed in the recessed portion, and...
US-7,989,883 System and method for providing a poly cap and a no field oxide area to prevent formation of a vertical bird's...
A system and method is disclosed that prevents the formation of a vertical bird's beak structure in the manufacture of a semiconductor device. A polysilicon...
US-7,989,882 Transistor with A-face conductive channel and trench protecting well region
A transistor structure optimizes current along the A-face of a silicon carbide body to form an AMOSFET that minimizes the JFET effect in the drift region during...
US-7,989,881 Semiconductor device structure with a tapered field plate and cylindrical drift region geometry
A vertically oriented self terminating semiconductor device such as a discrete trench MOS device (10, 38) that includes a cylindrical drift region (18) that...
US-7,989,880 Nonvolatile semiconductor memory device and method of manufacturing the same
A nonvolatile semiconductor memory device comprises a memory string, and a wiring. The memory string comprises a semiconductor layer, a charge storage layer,...
US-7,989,879 LDMOS transistor
The LDMOS transistor (1) of the invention comprises a source region (3), a channel region (4), a drain extension region (7) and a gate electrode (10). The LDMOS...
US-7,989,878 Cathode cell design
An n-channel insulated gate semiconductor device with an active cell (5) comprising a p channel well region (6) surrounded by an n type third layer (8), the...
US-7,989,877 Semiconductor devices including a dielectric layer
A semiconductor device includes a substrate and a doped hafnium oxide layer disposed on the substrate, the doped hafnium oxide layer including a hafnium oxide...
US-7,989,876 Nonvolatile semiconductor memory device
The present invention provides a nonvolatile semiconductor memory device including memory cells capable of electrically writing information, and each of the...
US-7,989,875 BiCMOS integration of multiple-times-programmable non-volatile memories
A BiCMOS substrate includes a bipolar area having a buried carrier layer, and a deep trench isolation (DTI) trench extending into the buried carrier layer to...
US-7,989,874 Nonvolatile memory device and method for manufacturing the same
The present invention discloses a nonvolatile memory device which can improve the data storage capacity without increasing the surface area of the device, and a...
US-7,989,873 Nonvolatile memory and manufacturing method thereof
Memory elements, switching elements, and peripheral circuits to constitute a nonvolatile memory are integrally formed on a substrate by using TFTs. Since...
US-7,989,872 Nonvolatile semiconductor memory element and nonvolatile semiconductor memory device
The channel of each nonvolatile semiconductor memory element has a plate-like shape, and a charge accumulating layer is formed on one face of the channel...
US-7,989,871 Nonvolatile semiconductor memory device having insulating films that include multiple layers formed by...
A nonvolatile semiconductor memory device includes a first insulating film on a channel, a floating gate electrode on the first insulating film, a second...
US-7,989,870 Use of dilute steam ambient for improvement of flash devices
A flash memory integrated circuit and a method for fabricating the same. A gate stack includes an initial oxide layer directly in contact with a silicon layer,...
US-7,989,869 Non-volatile memory devices having improved operational characteristics
Nonvolatile memory devices are provided. Devices include active regions that may be defined by device isolation layers formed on a semiconductor substrate and...
US-7,989,868 MOS varactor and fabricating method of the same
A MOS varactor for use in circuits and elements of a millimeter-wave frequency band, which is capable of reducing series resistance and enhancing a Q-factor by...
US-7,989,867 Semiconductor memory device having a semiconductor layer disposed between first and second gate electrodes
A semiconductor memory device includes a semiconductor substrate, a semiconductor layer, a source/drain layer, first and second insulating films, and first and...
US-7,989,866 DRAM layout with vertical FETS and method of formation
DRAM cell arrays having a cell area of about 4 F.sup.2 comprise an array of vertical transistors with buried bit lines and vertical double gate electrodes. The...
US-7,989,865 Deep trench capacitor for SOI CMOS devices for soft error immunity
A semiconductor structure is disclosed. The semiconductor structure includes an active semiconductor layer, a semiconductor device having a gate disposed on top...
US-7,989,864 Methods for enhancing capacitors having roughened features to increase charge-storage capacity
Structures and methods for making a semiconductor structure are discussed. The semiconductor structure includes a rough surface having protrusions formed from...
US-7,989,863 Method of forming a semiconductor device having an etch stop layer and related device
In one embodiment, a lower interlayer dielectric layer, and first and second landing pads penetrating the lower interlayer dielectric layer are formed on a...
US-7,989,862 Semiconductor device and its manufacturing method
A semiconductor device is equipped with a plug conductive layer formed in an interlayer dielectric film on a substrate, and a conductive member provided on the...
US-7,989,861 Image sensor and method of stabilizing a black level in an image sensor
An image sensor includes a substrate, an anti-reflection board and a light shielding film. The substrate includes first pixels to receive a light, and second...
US-7,989,860 Image sensor and method for manufacturing the same
An image sensor includes a circuitry, a substrate, an electrical junction region, a high concentration first conduction type region, and a photodiode. The...
US-7,989,859 Backside illuminated imaging sensor with silicide light reflecting layer
A backside illuminated imaging sensor includes a semiconductor layer, a metal interconnect layer and a silicide light reflecting layer. The semiconductor layer...
US-7,989,858 Image sensor and method of fabricating the same
Provided are an image sensor and a method of fabricating the same. The image sensor according to an embodiment includes a semiconductor substrate including a...
US-7,989,857 Electronic device including an insulating layer having different thicknesses and a conductive electrode and a...
An electronic device includes a transistor, wherein the electronic device can include a semiconductor layer having a primary surface, a channel region, a gate...
US-7,989,856 Fin transistor
A fin transistor includes: a substrate; a plurality of semiconductor fins formed on the substrate; a gate electrode covering a channel region of the...
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