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Patent # Description
US-8,026,179 Patterning method and integrated circuit structure
A patterning method is provided. First, a mask layer and a plurality of first transfer patterns are sequentially formed on a target layer. Thereafter, a...
US-8,026,178 Patterning method for high density pillar structures
A method of making a device includes forming a first photoresist layer over a sacrificial layer, patterning the first photoresist layer to form first...
US-8,026,177 Silicon dioxide cantilever support and method for silicon etched structures
A semiconductor device includes a semiconductor layer (2) having therein a cavity (4). A dielectric layer (3) is formed on the semiconductor layer. A plurality...
US-8,026,176 Film forming method, plasma film forming apparatus and storage medium
A technique for embedding metal in a microscopic recess provided in the surface of a process object, such as a semiconductor wafer, by plasma sputtering. A film...
US-8,026,175 Cleaning apparatus of semiconductor substrate and method of manufacturing semiconductor device
After a liquid chemical treatment is finished, in parallel with a washing away treatment and/or a drying treatment, by spraying from a nozzle for a cleaning...
US-8,026,174 Sequential station tool for wet processing of semiconductor wafers
Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where...
US-8,026,173 Semiconductor structure, in particular phase change memory device having a uniform height heater
A phase change memory formed by a plurality of phase change memory devices having a chalcogenide memory region extending over an own heater. The heaters have...
US-8,026,172 Method of forming contact hole arrays using a hybrid spacer technique
One embodiment of the invention provides a method of forming a plurality of contact holes, including forming a first feature and a second feature over an...
US-8,026,171 Method of fabricating metal interconnection and method of fabricating image sensor using the same
A method of fabricating a metal interconnection and a method of fabricating image sensor using the same are provided. The method of fabricating a metal...
US-8,026,170 Method of forming a single-layer metal conductors with multiple thicknesses
A pattern that includes trenches of different depths is formed on a substrate using nanoimprint lithography. A subsequent metal deposition forms lines of...
US-8,026,169 Cu annealing for improved data retention in flash memory devices
Data retention in flash memory devices, such as mirrorbit devices, is improved by reducing the generation and/or diffusion of hydrogen ions during back end...
US-8,026,168 Semiconductor device containing an aluminum tantalum carbonitride barrier film and method of forming
The method includes providing a substrate containing a dielectric layer having a recessed feature and forming a aluminum tantalum carbonitride barrier film over...
US-8,026,167 Semiconductor device and method of manufacturing the same
A metal interconnection of semiconductor device and method for fabricating the same is provided. The semiconductor device can include a semiconductor substrate...
US-8,026,166 Interconnect structures comprising capping layers with low dielectric constants and methods of making the same
Interconnect structures comprising capping layers with low dielectric constants and good oxygen barrier properties and methods of making the same are provided....
US-8,026,165 Process for producing air gaps in microstructures, especially of the air gap interconnect structure type for...
A process for producing at least one air gap in a microstructure, including supplying a microstructure having at least one gap filled with a sacrificial...
US-8,026,164 Semiconductor device and method of manufacturing the same
A method of manufacturing a semiconductor device, includes steps of forming an organic insulating film over a semiconductor substrate, irradiating an electron...
US-8,026,163 Manufacturing method of semiconductor integrated circuit device
When relatively hard Au bump electrodes are mass-produced by electrolytic plating while ensuring usually required properties such as a non-glossy property and...
US-8,026,162 Method of manufacturing layer-stacked wiring
A layer-stacked wiring made up of a microcrystalline silicon thin film and a metal thin film is provided which is capable of suppressing an excessive silicide...
US-8,026,161 Highly reliable amorphous high-K gate oxide ZrO2
A gate oxide and method of fabricating a gate oxide that produces a more reliable and thinner equivalent oxide thickness than conventional SiO.sub.2 gate oxides...
US-8,026,160 Semiconductor device and semiconductor device manufacturing method
In a semiconductor device using a SiC substrate, a Junction Termination Edge (JTE) layer is hardly affected by fixed charge so that a stable dielectric strength...
US-8,026,159 Method of manufacturing semiconductor device and substrate processing apparatus
A method of manufacturing a semiconductor device includes the steps of loading a substrate into a processing chamber; processing the substrate by supplying...
US-8,026,158 Systems and methods for processing semiconductor structures using laser pulses laterally distributed in a...
Systems and methods process structures on or within a semiconductor substrate using a series of laser pulses. In one embodiment, a deflector is configured to...
US-8,026,157 Gas mixing method realized by back diffusion in a PECVD system with showerhead
Embodiments of the present invention generally relate to methods of forming a microcrystalline silicon layer on a substrate in a deposition chamber. In, one...
US-8,026,156 Method of fabricating nitride-based compound layer, GaN substrate and vertical structure nitride-based...
In a method for fabricating a nitride-based compound layer, first, a GaN substrate is prepared. A mask layer with a predetermined pattern is formed on the GaN...
US-8,026,155 Method for producing semiconductor device
A method for producing a semiconductor device includes forming an aluminum layer on a core substrate, anodizing the aluminum layer into an alumina layer having...
US-8,026,154 Laser working method
An object to be processed is restrained from warping at the time of laser processing. A modified region M2 is formed within a wafer 11, and fractures a2, b2...
US-8,026,153 Wafer processing method
A wafer processing method of dividing a wafer into individual devices, the wafer having on a front surface a device area and an external circumferential...
US-8,026,152 Separation method of semiconductor device
It is an object to provide a semiconductor device integrating various elements without using a semiconductor substrate, and a method of manufacturing the same....
US-8,026,151 Method with high gapfill capability for semiconductor devices
A method of performing an STI gapfill process for semiconductor devices is provided. In a specific embodiment of the invention, the method includes forming an...
US-8,026,150 Semiconductor device manufacturing method and storage medium
A method of manufacturing a semiconductor device, including an interlayer insulating layer having a dielectric constant of about 1, includes at least one of...
US-8,026,149 Substrate with marker, manufacturing method thereof, laser irradiation apparatus, laser irradiation method,...
To provide a laser irradiation apparatus which performs alignment of an irradiated object and emits a laser beam precisely, a laser irradiation method, and a...
US-8,026,148 Methods of utilizing silicon dioxide-containing masking structures
Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of...
US-8,026,147 Method of fabricating a semiconductor microstructure
Provided is a method of fabricating a semiconductor microstructure, the method including forming a lower material layer on a semiconductor substrate, the lower...
US-8,026,146 Method of manufacturing a bipolar transistor
The invention provides for an alternative and less complex method of manufacturing a bipolar transistor comprising a field plate (17) in a trench (7) adjacent...
US-8,026,145 Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering
A process for the preparation of low resistivity arsenic or phosphorous doped (N+/N++) silicon wafers which, during the heat treatment cycles of essentially any...
US-8,026,144 Method for manufacturing semiconductor device
In a semiconductor device having a raised source and drain structure, in forming a raised region by etching, etching of an island-like semiconductor film which...
US-8,026,143 Semiconductor element and manufacturing method thereof
The object of the present invention is to provide a method of manufacturing high permittivity gate dielectrics for a device such as an MOSFET. A HfSiO film is...
US-8,026,142 Method of fabricating semiconductor transistor devices with asymmetric extension and/or halo implants
A method of fabricating semiconductor devices begins by providing or fabricating a device structure that includes a semiconductor material and a plurality of...
US-8,026,141 Method of producing semiconductor
In a conventional SGT production method, during dry etching for forming a pillar-shaped silicon layer and a gate electrode, an etching amount cannot be...
US-8,026,140 Method of forming flash memory device
The present invention relates to a method of forming a flash memory device, which is capable of forming floating gates. According to a method of forming a flash...
US-8,026,139 Method of fabricating a non-volatile memory device
In a method of fabricating a non-volatile memory device, a semiconductor substrate includes an isolation layer formed in an isolation region, a tunnel...
US-8,026,138 Method for manufacturing semiconductor apparatus having saddle-fin transistor and semiconductor apparatus...
A method for manufacturing a semiconductor memory apparatus may include forming a channel region and a gate region through a self-alignment etching process on a...
US-8,026,137 Production method of a capacitor
A method for producing a capacitor having a good capacitance appearance factor and a low ESR comprising, as one electrode (anode), an electric conductor having...
US-8,026,136 Methods of forming low hydrogen concentration charge-trapping layer structures for non-volatile memory
Memory cells comprising: a semiconductor substrate having at least two source/drain regions separated by a channel region; a charge-trapping structure disposed...
US-8,026,135 Formation of shallow junctions by diffusion from a dielectric doped by cluster or molecular ion beams
A process for forming diffused region less than 20 nanometers deep with an average doping dose above 10.sup.14 cm.sup.-2 in an IC substrate, particularly LDD...
US-8,026,134 Recessed drain and source areas in combination with advanced silicide formation in transistors
During the manufacturing process for forming sophisticated transistor elements, the gate height may be reduced and a recessed drain and source configuration may...
US-8,026,133 Method of fabricating a semiconductor device with a non-uniform gate insulating film
A semiconductor device includes a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate...
US-8,026,132 Leakage barrier for GaN based HEMT active device
An improved HEMT formed from a GaN material system is disclosed which has reduced gate leakage current relative to known GaN based HEMTs and eliminates the...
US-8,026,131 SOI radio frequency switch for reducing high frequency harmonics
First doped semiconductor regions having the same type doping as a bottom semiconductor layer and second doped semiconductor regions having an opposite type...
US-8,026,130 Method for manufacturing a semiconductor integrated circuit device
A method is provided for manufacturing a QFN type semiconductor integrated circuit device using a multi-device lead frame having a tie bar for tying external...
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