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| Patent # | Description |
|---|---|
| US-8,048,825 |
Haloalkylsulfonanilide derivatives or salt thereof, herbicide comprising
the derivatives as active ingredient,... A haloalkylsulfonanilide derivative represented by general formula (I) or a salt thereof wherein R.sup.1 represents a halo(C.sub.1-C.sub.8)alkyl group, R.sup.2,... |
| US-8,048,824 |
Systems and methods for printing borderless images on printable media A system of printing borderless images on printable media includes at least one sheet of printable media including an imaging surface and a non-imaging surface.... |
| US-8,048,823 |
Metallic foil for producing honeycomb bodies, honeycomb body produced
therefrom and method of producing a... A foil for producing a metal honeycomb or catalyst carrier body, has an average surface roughness of more than 0.3 .mu.m (micrometers) on both surfaces in at... |
| US-8,048,822 |
Method for making silicon-containing products A method for producing carbon-silica products from silica-containing plant matter such as rice hulls or straw by leaching with sulfuric acid to remove... |
| US-8,048,821 |
Catalyst composition for the synthesis of thin multi-walled carbon
nanotube and its manufacturing method The present invention relates to a catalyst composition for the synthesis of thin multi-walled carbon nanotube (MWCNT) and a method for manufacturing a catalyst... |
| US-8,048,820 |
Shaped catalyst body for partial oxidation reactions The invention relates to a shaped catalyst body for preparing maleic anhydride, which comprises mixed oxides of vanadium and of phosphorus as catalyst... |
| US-8,048,819 |
Cure catalyst, composition, electronic device and associated method A cure catalyst is provided. The cure catalyst may include a Lewis acid and one or both of a nitrogen-containing molecule or a non-tertiary phosphine. The... |
| US-8,048,818 |
In-situ regeneration of a catalyst masked by calcium sulfate An in-situ method for regenerating a deactivated catalyst removes a calcium sulfate layer masking active catalyst sites. A reducing agent converts the calcium... |
| US-8,048,817 |
Amorphous silica powder, process for its production, and sealing material
for semiconductors To provide an amorphous silica powder suitable for a sealing material for semiconductors having improved HTSL properties and HTOL properties, and a process for... |
| US-8,048,816 |
Colored machinable glass-ceramics The invention relates to opaque, colored glass-ceramic articles and to the production of opaque, colored glass-ceramic articles which can be readily formed to a... |
| US-8,048,815 |
Composite article and method of manufacture The present invention relates to a composite article and to a process for manufacturing the composite article. The composite article comprises multiple layers... |
| US-8,048,814 |
Methods and apparatus for aligning a set of patterns on a silicon
substrate A method of aligning a set of patterns on a substrate, the substrate including a substrate surface, is disclosed. The method includes depositing a set of... |
| US-8,048,813 |
Method of reducing delamination in the fabrication of small-pitch devices A method of forming an integrated circuit structure includes providing a substrate; forming a first hard mask layer over the substrate; forming a second hard... |
| US-8,048,812 |
Pitch reduced patterns relative to photolithography features Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns.... |
| US-8,048,811 |
Method for patterning a metallization layer by reducing resist strip
induced damage of the dielectric material By forming a hardmask layer in combination with one or more cap layers, undue exposure of a sensitive dielectric material to resist stripping etch ambients may... |
| US-8,048,810 |
Method for metal gate N/P patterning A method for fabricating a integrated circuit is disclosed. An exemplary method includes providing a substrate; forming a hard mask layer over the substrate;... |
| US-8,048,809 |
Polishing method using chemical mechanical slurry composition A slurry composition includes about 4.25 to about 18.5 weight percent of an abrasive, about 80 to about 95 weight percent of deionized water, and about 0.05 to... |
| US-8,048,808 |
Slurry compositions for polishing metal, methods of polishing a metal
object and methods of forming a metal... A slurry composition for polishing metal includes a polymeric polishing accelerating agent, the polymeric polishing accelerating agent including a backbone of... |
| US-8,048,807 |
Method and apparatus for thinning a substrate Provided is a method for fabricating a semiconductor device that includes providing a semiconductor substrate having a front side and a backside, where active... |
| US-8,048,806 |
Methods to avoid unstable plasma states during a process transition In some implementations, a method is provided in a plasma processing chamber for stabilizing etch-rate distributions during a process transition from one... |
| US-8,048,805 |
Methods for growing low-resistivity tungsten film Improved methods for depositing low resistivity tungsten films are provided. The methods involve depositing a tungsten nucleation layer on a substrate and then... |
| US-8,048,804 |
Method of manufacturing semiconductor package A method of manufacturing a semiconductor package, including at least a step A that forms a first transforming portion by irradiating a laser beam on at least a... |
| US-8,048,803 |
Method for forming contact plug in a semiconductor device A method for forming a contact plug in a semiconductor device includes providing a substrate having an insulation layer. A hard mask pattern is formed over the... |
| US-8,048,802 |
Method for forming interlayer insulating film in semiconductor device A method for forming an interlayer insulating film includes providing a semiconductor substrate having a first substrate region with a plurality of metal wiring... |
| US-8,048,801 |
Substrate with feedthrough and method for producing the same A substrate with first and second main surfaces includes at least one channel extending from the first main surface to the second main surface. The at least one... |
| US-8,048,800 |
Fabrication method of two-terminal semiconductor component using trench
technology A method of fabricating a two-terminal semiconductor component using a trench technique is disclosed that includes forming a trench by etching an etching... |
| US-8,048,799 |
Method for forming copper wiring in semiconductor device A method for forming copper wirings in a semiconductor device may include depositing a lower insulating film over a semiconductor substrate; forming vias in the... |
| US-8,048,798 |
Method for manufacturing a nonvolatile semiconductor storage device where
memory cells are arranged three... A method for manufacturing a nonvolatile semiconductor storage device, including: forming a first conductive layer so that it is sandwiched in an up-down... |
| US-8,048,797 |
Multilayer low reflectivity hard mask and process therefor A method utilizing a multilayer anti-reflective coating layer structure can achieve low reflectivity at high numerical apertures. The multilayer anti-reflective... |
| US-8,048,796 |
Microstructure device including a metallization structure with
self-aligned air gaps formed based on a... In a sophisticated metallization system of a semiconductor device, air gaps may be formed in a self-aligned manner on the basis of a sacrificial material, such... |
| US-8,048,795 |
Self-assembly pattern for semiconductor integrated circuit A method of fabricating a semiconductor device is provided which includes providing a substrate. A material layer is formed over the substrate. A polymer layer... |
| US-8,048,794 |
3D silicon-silicon die stack structure and method for fine pitch
interconnection and vertical heat transport A method of fabricating a thin wafer die includes creating circuits and front-end-of-line wiring on a silicon wafer, drilling holes in a topside of the wafer,... |
| US-8,048,793 |
Flip chip for electrical function test and manufacturing method thereof Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the... |
| US-8,048,792 |
Superior fill conditions in a replacement gate approach by corner rounding
prior to completely removing a... In a replacement gate approach, a superior cross-sectional shape of the gate opening may be achieved by performing a material erosion process in an intermediate... |
| US-8,048,791 |
Method of forming a semiconductor device Methods for forming a semiconductor device comprising a semiconductor substrate are provided. In accordance with an exemplary embodiment, a method comprises... |
| US-8,048,790 |
Method for self-aligning a stop layer to a replacement gate for
self-aligned contact integration Semiconductor devices with replacement gate electrodes and integrated self aligned contacts are formed with enhanced gate dielectric layers and improved... |
| US-8,048,789 |
Mesoscale pyramids, arrays and methods of preparation Ordered, two-dimensional arrays of pyramidal particulates and related methods of preparation. |
| US-8,048,788 |
Method for treating non-planar structures using gas cluster ion beam
processing A method for treating a structure is described. One embodiment includes forming a structure on a substrate, wherein the structure has a plurality of surfaces... |
| US-8,048,787 |
Methods of forming semiconductor devices Provided are a semiconductor device and a method of forming the same. The method may include forming a gate dielectric layer including a plurality of elements... |
| US-8,048,786 |
Method for fabricating single-crystalline substrate containing gallium
nitride The present invention provides a method for fabricating a single-crystalline substrate containing gallium nitride (GaN) comprising the following steps. First,... |
| US-8,048,785 |
Method of fabricating nanosized filamentary carbon devices over a
relatively large-area Nanosized filamentary carbon structures (CNTs) nucleating over a catalyzed surface may be grown in an up-right direction reaching a second surface, spaced from... |
| US-8,048,784 |
Methods of manufacturing semiconductor devices including a doped silicon
layer Methods for manufacturing a semiconductor device include forming a seed layer containing a silicon material on a substrate. An amorphous silicon layer... |
| US-8,048,783 |
Method of forming polycrystalline silicon layer and atomic layer
deposition apparatus used for the same A method of forming a polycrystalline silicon layer and an atomic layer deposition apparatus used for the same. The method includes forming an amorphous silicon... |
| US-8,048,782 |
Plasma deposition of amorphous semiconductors at microwave frequencies Apparatus and method for plasma deposition of thin film photovoltaic materials at microwave frequencies. The apparatus avoids deposition on windows or other... |
| US-8,048,781 |
Methods and systems for packaging integrated circuits Methods of packaging integrated circuits are described. One method relates to attaching a singulated device wafer to a substrate. The singulated device wafer... |
| US-8,048,780 |
Method of processing optical device wafer A method of dividing an optical device wafer includes: a laser beam processing step of performing laser beam processing on the face side of an optical device... |
| US-8,048,778 |
Methods of dicing a semiconductor structure An embodiment of the disclosure includes a method of dicing a semiconductor structure. A device layer on a semiconductor substrate is provided. The device layer... |
| US-8,048,777 |
Method for manufacturing semiconductor device An object is to suppress discharge due to static electricity generated by peeling, when an element formation layer including a semiconductor element is peeled... |
| US-8,048,776 |
Semiconductor device and method of supporting a wafer during backgrinding
and reflow of solder bumps A semiconductor device is made by providing a semiconductor wafer having an active surface, forming an under bump metallization layer on the active surface of... |
| US-8,048,775 |
Process of forming ultra thin wafers having an edge support ring A process of forming ultra thin wafers having an edge support ring is disclosed. The process provides an edge support ring having an angled inner wall... |
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