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| Patent # | Description |
|---|---|
| US-8,067,986 |
Closed loop surge protection technique for differential amplifiers A differential amplifier with surge protection is described. The differential amplifier includes a first output driver device, a second output driver device, a... |
| US-8,067,985 |
Resonant operating mode for a transistor The PN junctions of a transistor are biased for operation in the active mode but an initial flow of current reverses the bias of the base-emitter junction... |
| US-8,067,984 |
Variable gain circuit There is provided a variable gain circuit system which is inductorless and capable of achieving a high gain and a wide band by elements for achieving variable... |
| US-8,067,983 |
High bandwidth, rail-to-rail differential amplifier with intermediate
stage current amplifier An error amplifier expected to exhibit rail-to-rail operation, high bandwidth, and high slew rate, is described, the error amplifier comprising a first stage to... |
| US-8,067,982 |
Transconductance amplifier with improved linearity The invention relates to a transconductance amplifier, intended to supply current variations di when it receives voltage variations dv, with a desired... |
| US-8,067,981 |
Method and system for extending dynamic range of an RF signal Aspects of a method and system for extending dynamic range of an RF signal are provided. In this regard, an amplitude signal that is representative of an... |
| US-8,067,980 |
Pulse width modulation circuit and class-D amplifier comprising the PWM
circuit A pulse width modulation (PWM) circuit comprises a first integrator (g m1) with a first feedback capacitor (C.sub.1), a second integrator (g.sub.m1) with a... |
| US-8,067,979 |
Semiconductor device and power supply device using the same A semiconductor device capable of reducing an inductance is provided. In the semiconductor device in which a rectification MOSFET, a commutation MOSFET, and a... |
| US-8,067,978 |
Dynamic current supplying pump A pump system that can dynamically increase its current capability includes: a pump circuit, for producing an output voltage; an oscillator, for driving the... |
| US-8,067,977 |
Voltage generating circuit and semiconductor device having the same An active charge pump circuit may include a charge pump circuit, a control circuit, and a charge transfer circuit. The charge pump circuit may generate a charge... |
| US-8,067,976 |
Semiconductor integrated circuit A semiconductor integrated circuit (1) comprises a substrate voltage control circuit (10A), a drain current adjuster (E1), a MOS device characteristic detection... |
| US-8,067,975 |
MOS resistor with second or higher order compensation A circuit arrangement (e.g., an integrated circuit) generates a second or higher order compensation voltage to compensate for variations in operation parameters... |
| US-8,067,974 |
Signal transformation arrangement and method for signal transformation A signal transformation arrangement comprises a first input tap (1) to receive a first input signal (IN_P), a first output terminal (3) to provide a first... |
| US-8,067,973 |
Driver for a flyback converter using a transconductance amplifier and a
comparator The present invention discloses a smart driver used in flyback converters adopting a transconductance amplifier to turn on a synchronous rectifier FET, and a... |
| US-8,067,972 |
Filter circuit and communication device A filter circuit includes a voltage-current conversion portion that converts a voltage signal input to an input terminal to a current signal, a first capacitor... |
| US-8,067,971 |
Providing additional inputs to a latch circuit A latch circuit for retaining and transmitting an input data value is disclosed, along with a memory, and a method for retaining and transmitting data. The... |
| US-8,067,970 |
Multi-write memory circuit with a data input and a clock input Various types of memory circuits are described. A memory circuit may include a state-storage feedback loop coupled to a clock input and to a data input. The... |
| US-8,067,969 |
Integrated circuit An integrated circuit includes a pull-up compensation path unit configured to adjust a pull-up driving power of an input signal; a pull-down compensation path... |
| US-8,067,968 |
Locking state detector and DLL circuit having the same A locking state detector includes a phase comparing unit configured to compare a reference clock signal and a feedback clock signal to generate a first phase... |
| US-8,067,967 |
Phase delay line A phase delay line comprises a phase-locked loop, a duty-cycle adjusting ring and a voltage-sharing to time-sharing converter, wherein the phase-locked loop and... |
| US-8,067,966 |
Voltage controlled delay loop and method with injection point control A voltage controlled delay loop and method are disclosed for clock and data recovery applications. The voltage controlled delay loop generates clock signals... |
| US-8,067,965 |
Clock and data recovery circuit with proportional path A clock and data recovery circuit includes a phase detector, a charge pump, a loop filter, a voltage-controlled oscillator and a frequency divider. The... |
| US-8,067,964 |
Output circuit The present invention is aimed at providing an output circuit that is of relatively small scale and may perform adjustment to make the output-signal rise slew... |
| US-8,067,963 |
Sense-amplifier control circuit and controlling method of sense amplifier A sense amplifier control circuit includes an initial-voltage setting circuit configured to set a control signal to an initial voltage, the control signal... |
| US-8,067,962 |
Semiconductor integrated circuit device A semiconductor integrated circuit device has a combinational logic circuit including one or plural logic cells connected in series. At least one of the logic... |
| US-8,067,961 |
Level conversion circuit for converting voltage amplitude of signal In a level conversion circuit, two P channel MOS transistors form a current mirror circuit. When an input signal rises from the "L" level to the "H" level, an N... |
| US-8,067,960 |
Runtime loading of configuration data in a configurable IC Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different... |
| US-8,067,959 |
Programmable delay line compensated for process, voltage, and temperature A delay line compensated for process, voltage, and temperature variations, includes a delay locked loop (DLL) configured to delay a digital signal by the clock... |
| US-8,067,958 |
Mitigating side effects of impedance transformation circuits Implementations to mitigating side effects of impedance transformation circuits are described. In particular, mitigation circuitry may be coupled to a high... |
| US-8,067,957 |
USB 2.0 HS voltage-mode transmitter with tuned termination resistance A high-speed universal serial bus (USB) transceiver includes a voltage-mode architecture for generating a USB signal. The voltage mode architecture reduces... |
| US-8,067,956 |
Apparatus and method for calibrating on-die termination in semiconductor
memory device An on-die termination circuit in a semiconductor memory apparatus can comprise a comparing block for comparing a reference voltage with a code voltage... |
| US-8,067,955 |
Preventing erroneous operation in a system where synchronized operation is
required This invention is a method of operating a system having multiple finite state machines where each finite state machine generating a ready signal when its... |
| US-8,067,954 |
Fault tolerant integrated circuit architecture The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element... |
| US-8,067,953 |
Semiconductor device for measuring ultra small electrical currents and
small voltages A semiconductor device for measuring ultra low currents down to the level of single electrons or low voltages comprises a first and a second voltage supply... |
| US-8,067,952 |
System-level ESD detection circuit An ESD detection circuit for detecting a level of an ESD voltage on a power rail is provided. The ESD detection circuit includes a resistive component, a diode... |
| US-8,067,951 |
Method of expanding tester drive and measurement capability A probe card assembly can comprise an interface, which can be configured to receive from a tester test signals for testing an electronic device. The probe card... |
| US-8,067,950 |
Semiconductor device including chip A semiconductor device in which a chip 10 is mounted on a board, includes: a pad group A provided on the chip 10 and electrically connected to an internal... |
| US-8,067,949 |
Methods for testing lasers using optical burn-in Semiconductor lasers are aged to identify weak or flawed devices, resulting in improved reliability of the remaining devices. The lasers can be aged using a... |
| US-8,067,948 |
Input/output multiplexer bus An input/output ("I/O") system includes a plurality of input/output ("I/O") ports, measurement circuitry, and an I/O multiplexer bus. The measurement circuitry... |
| US-8,067,947 |
Low noise differential charge amplifier for measuring discrete charges in
noisy and corrosive environments A low noise differential charge amplifier circuit for measuring discrete (e.g., pico coulomb) charges in noisy, elevated temperature and corrosive environments.... |
| US-8,067,946 |
Method for repairing a transmission line in an electrical power
distribution system The invention provides a faulted circuit indicator apparatus with transmission line state display, as well as methods for using the apparatus. The faulted... |
| US-8,067,945 |
Method and apparatus for monitoring a material medium A material medium, such as an optical fiber or electrical cable, is commonly used to carry services, such as telecommunications or energy service. The current... |
| US-8,067,944 |
USB component tester A universal serial bus (USB) component tester for testing a USB component that has a plug and a USB port includes a connector, a USB port, and a first... |
| US-8,067,943 |
Test apparatus, calibration method, program, and recording medium Provided is a test apparatus, a calibration method, a program causing a computer to perform as a test apparatus, and a recording medium storing the program. The... |
| US-8,067,942 |
Method for locating phase to ground faults in DC distribution systems A method for locating phase to ground faults in DC distribution systems. The method includes utilizing wavelet analysis using Multi-Resolution Analysis (MRA) as... |
| US-8,067,941 |
System for streamer electrical resistivity survey and method for analysis
of underground structure below a riverbed A system for measuring electrical resistivity survey checks a border of bedrock or a thickness of a sedimentary layer in a riverbed of a river or lake within a... |
| US-8,067,940 |
Tubular magnetic resonance surface coil, and method and system for
processing signals therefrom In a method and system for processing radio frequency signals of a tubular surface coil, the N channels of coil output signals are generated based on M channels... |
| US-8,067,939 |
Magnetic resonance gradient coil formed by two different types of
conductors A gradient coil of a magnetic resonance apparatus has a first conductor structure and a second conductor structure connected with one another so that windings... |
| US-8,067,938 |
Microcoil NMR detectors The present invention provides resonance circuits, detection devices incorporating such circuits, and methods for their design, construction, and use. |
| US-8,067,937 |
Probe and system for electron spin resonance imaging ESR imaging probe, system, and method are described. The probe is an ex-situ probe, the system comprises the probe and configured for operating the probe, and... |
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