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Patent # Description
US-8,069,342 Computer having a BIOS clear button which is capable of avoiding mistouch
A computer and a BIOS clear button thereof are provided. The BIOS clear button is adapted to be electrically connected with a motherboard of the computer. The...
US-8,069,341 Unified provisioning of physical and virtual images
A system for the unified provisioning of virtual and physical disk images is created. The system includes a library of disk images. Client devices are able to...
US-8,069,340 Microprocessor with microarchitecture for efficiently executing read/modify/write memory operand instructions
A microprocessor instruction translator translates a macroinstruction into three microinstructions to perform a read/modify/write operation on a memory operand....
US-8,069,339 Microprocessor with microinstruction-specifiable non-architectural condition code flag register
A microprocessor includes an architectural register and a non-architectural register, each having a plurality of condition code flags. A first instruction of...
US-8,069,338 Data processing device and control method for preventing an exception caused by an instruction sent to a...
A data processing device includes a program execution section to supply an operation direction signal to a peripheral device based on an executed program and...
US-8,069,337 Methods and apparatus for dynamic instruction controlled reconfigurable register file
A scalable reconfigurable register file (SRRF) containing multiple register files, read and write multiplexer complexes, and a control unit operating in...
US-8,069,336 Transitioning from instruction cache to trace cache on label boundaries
Various embodiments of methods and systems for implementing a microprocessor that includes a trace cache and attempts to transition fetching from instruction...
US-8,069,335 Processing system and method for executing instructions
A processing system for executing instructions comprises a first part (11) having address information and a plurality of data bits, E.sub.0 to E.sub.N....
US-8,069,334 Parallel histogram generation in SIMD processor by indexing LUTs with vector data element values
The present invention provides histogram calculation for images and video applications using a SIMD and VLIW processor with vector Look-Up Table (LUT)...
US-8,069,333 Converting logical to real number to access shared configuration information in event driven state transiting...
A data processing device comprises a state manager for determining a logic number of configurational information to be used in a next state, the logic number...
US-8,069,332 Device and method for extracting memory data
A device and method for extracting data stored in a volatile memory are provided. In particular, a memory-data extracting device and method for ensuring...
US-8,069,331 Storage system, storage extent release method and storage apparatus
This storage system has an allocation unit for allocating a storage extent in prescribed units to the dynamic logical volume upon storing the data sent from the...
US-8,069,330 Memory management system for reducing memory fragmentation
A memory management system for a process formulated in the C/C++ language in a processing unit includes an allocator which processes memory blocks of...
US-8,069,329 Internally triggered reconfiguration of programmable logic devices
Various techniques are described to provide an internally triggered reconfiguration of a programmable logic device (PLD). In one example, a PLD includes...
US-8,069,328 Daisy chain cascade configuration recognition technique
Methods and systems provide recognition of a device in a daisy chain cascade configuration. Input circuitry at a device receives an input signal that indicates...
US-8,069,327 Commands scheduled for frequency mismatch bubbles
In some embodiments, a chip includes chip interface transmitters, a chip, and clock gearing logic. The transmitters are to transmit signals in frames including...
US-8,069,326 Relocation system and a relocation method
Provided are a relocation system and a relocation method capable of relocating a virtual volume that is formed based on thin provisioning while ensuring...
US-8,069,325 Region protection unit, instruction set and method for protecting a memory region
A memory region protection unit is disclosed that comprises a first register for storing a memory region address, a second register for storing the memory...
US-8,069,324 Storage device with manual learning
In a particular embodiment, a system is disclosed that includes a controller to read data from and write data to a first storage medium. The controller is...
US-8,069,323 Storage system and remote copy control method
A storage system is provided which is capable of realizing a remote copy function for speeding up lines virtually by satisfying such demand to distribute copy...
US-8,069,322 Active-active remote configuration of a storage system
A method for data storage, including configuring a first logical volume on a first storage system and a second logical volume on a second storage system. The...
US-8,069,321 Secondary pools
Methods and apparatus for generating a secondary pool of data are disclosed. A primary pool of data is obtained or identified, where the primary pool of data...
US-8,069,320 System and method for consolidation of backups
A system, method and computer program product for consolidation of backups, wherein each backup includes data and a backup map with offsets that point to data...
US-8,069,319 Sharing memory resources of wireless portable electronic devices
It is not uncommon for two or more wireless-enabled devices to spend most of their time in close proximity to one another. For example, a person may routinely...
US-8,069,318 High performance data rate system for flash devices
A Flash memory system includes N flash devices, where N is an integer, each flash device having a flash device interface consisting of a control signal line, a...
US-8,069,317 Providing and utilizing high performance block storage metadata
An enhanced mechanism for the allocation, organization and utilization of high performance block storage metadata provides a stream of data (e.g., in a server...
US-8,069,316 Computer system, control method thereof and data processing apparatus
A computer system and a method of controlling a computer system, the computer system including: a first memory corresponding to a first channel and a second...
US-8,069,315 System and method for parallel scanning
A system and method for parallel scanning among multiple scanning entities. According to various embodiments of the present invention, buffers are allocated...
US-8,069,314 Shared memory architecture in GPS signal processing
A shared memory architecture for a GPS receiver, wherein a processing memory is shared among the different processing functions, such as the correlator signal...
US-8,069,313 Method and system for managing cache invalidation
In one embodiment the present invention includes a method and system for managing cache invalidation. In one embodiment, connection information to a database in...
US-8,069,312 Apparatus, circuit and method of controlling memory initialization
An apparatus includes a first memory which includes a plurality of memory regions, a second memory which stores initializing information indicating whether each...
US-8,069,311 Methods for prefetching data in a memory storage structure
A method includes detecting a cache miss. The method further includes, in response to detecting the cache miss, traversing a plurality of linked memory nodes in...
US-8,069,310 Methods and systems for incorporating sequential stream read requests into prefetch management for data storage...
Data units are prefetched into a cache memory by executing a first prefetch task to prefetch a first prefetch series of data units from off-cache. A first...
US-8,069,309 Servicing memory in response to system failure
Memory is serviced. In response to an input indicating a serious condition, a service is invoked that is unaffected by the serious condition. By the service, it...
US-8,069,308 Cache pooling for computing systems
In a computing system a method and apparatus for cache pooling is introduced. Threads are assigned priorities based on the criticality of their tasks. The most...
US-8,069,307 Accessing metadata with an external host
Systems and processes may be used to retrieve metadata from a nonvolatile memory of a portable device and transmit the retrieved metadata to an external host....
US-8,069,306 Data area managing method in information recording medium and information processor employing data area...
Area management information is cached in a cache memory by controlling the access size when an information processor accesses the area management information in...
US-8,069,305 Logging latency reduction
A disk is divided into K angular regions. A log write request is replicated K times and K number of identical log writes are issued to the disk to be written to...
US-8,069,304 Determining the presence of a pre-specified string in a message
A network device determines the presence of the pre-specified string in a message based on a sequence matching rule. A sequence represents non-contiguous...
US-8,069,303 Method and apparatus for controlling memory precharge operation
A memory controller sequentially holds access requests including access addresses. A semiconductor memory includes a plurality of banks each having a plurality...
US-8,069,302 Flash memory storage system and method
A flash memory storage system includes a memory array containing a plurality of memory cells and a controller for controlling the flash memory array. The...
US-8,069,301 Apparatus, storage system, and computer program product for prevention of data loss
A data control apparatus includes a mapping-table managing unit that manages a mapping table that is associated with a corrupted-data recovery function of...
US-8,069,300 Solid state storage device controller with expansion mode
Solid state storage device controllers, solid state storage devices, and methods for operation of solid state storage device controllers are disclosed. In one...
US-8,069,299 Banded indirection for nonvolatile memory devices
Methods, apparatuses, and computer program products that enable banded indirection for nonvolatile memory devices, such as flash memory devices, are disclosed....
US-8,069,298 Method of storing and accessing header data from memory
Methods of storing and accessing data using a header portion of a file are disclosed. In an embodiment, a method of storing content in a non-volatile memory is...
US-8,069,297 Storage device, computer system, and storage device access method
A storage device that includes: an address table; a cache memory; a flash memory device that is a storage medium for user data; and a control circuit that is in...
US-8,069,296 Semiconductor memory device including control means and memory system
A semiconductor memory device includes a first nonvolatile memory which has a first external interface and is capable of recording 1-bit data in one memory...
US-8,069,295 Processing system with RF data bus and method for use therewith
A processing system includes a plurality of first circuit modules. A plurality of second circuit modules are coupled to an RF data bus via a 60 GHz...
US-8,069,294 Power-optimized frame synchronization for multiple USB controllers with non-uniform frame rates
A method, apparatus, and system to synchronize multiple host controllers with non-uniform frame rates. The apparatus includes a first host controller, a second...
US-8,069,293 Flexible server network connection upgrade systems and methods
In some embodiments, a system allowing a flexible upgrade of a computer system (e.g. server) to a high-speed network connection comprises base configuration...
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