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| Patent # | Description |
|---|---|
| US-8,072,282 |
Method of compensating an oscillation frequency and PLL A method for compensating an oscillation frequency, a device, and a phase locked loop (PLL) is applied in the LC oscillating loop, including: sending voltage... |
| US-8,072,281 |
Method, system and apparatus for accurate and stable LC-based reference
oscillators A substantially temperature-independent LC-based oscillator is achieved using an LC tank that generates a tank oscillation at a phase substantially equal to a... |
| US-8,072,280 |
Voltage-controlled oscillator A voltage-controlled oscillator comprises a variable inductor, a negative impedance circuit, an operating voltage source and a ground point. The variable... |
| US-8,072,279 |
Crystal oscillator with pedestal An object of the invention is to provide an oscillator with a pedestal that facilitates soldering operations and offers a high level of productivity. A surface... |
| US-8,072,278 |
System and method for reducing power consumption of an oscillator An apparatus for generating an oscillating signal including a negative-resistance circuit, a crystal, and a component to modify a series resonance of the... |
| US-8,072,277 |
Spread spectrum frequency synthesizer A frequency synthesizer is described illustrating a method for modulation having an adjustable standard curve used to modulate an input signal for spread... |
| US-8,072,276 |
Surface mount crystal oscillator There is provided a surface mount oscillator of a junction type in which the size of an IC chip is increased while maintaining high performance thereof, and the... |
| US-8,072,275 |
Digital ring oscillator A digital ring oscillator outputting a toggled clock signal. The clock signal is generated by a plurality of electronic cells that are arranged in series. At... |
| US-8,072,274 |
Oscillation circuit A differential oscillation circuit according to the present invention is a differential oscillation circuit including a feedback loop circuit. The differential... |
| US-8,072,273 |
System employing synchronized crystal oscillator-based clock, to be used
in either discrete or integrated... A synchronized clock system, for use with an electronic system having several system nodes requiring a synchronized clock signal. The clock system may be formed... |
| US-8,072,272 |
Digital tunable inter-stage matching circuit A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus includes a first active circuit (e.g., a... |
| US-8,072,271 |
Termination circuit based linear high efficiency radio frequency amplifier The present disclosure relates to RF power amplifier circuitry that may include a source termination circuit, a load termination circuit, or both used in an... |
| US-8,072,270 |
CMOS RF power amplifier with LDMOS bias circuit for large supply voltages Bias circuitry that may be used within a communications or other device includes a first current mirror having first and second transistors with sources coupled... |
| US-8,072,269 |
Amplifier Briefly, one or more embodiments of an amplifier, including example applications, are described. |
| US-8,072,268 |
Operational amplifier An operational amplifier has an input stage that branches a first current according to first and second input signals. An output stage generates an output... |
| US-8,072,267 |
Phase margin modification in operational transconductance amplifiers The present disclosure relates to phase margin modification in operational transconductance amplifiers. |
| US-8,072,266 |
Class G amplifier with improved supply rail transition control An apparatus and method are provided for a Class G amplifier that includes an output stage, where an output stage supply voltage is selected based upon an input... |
| US-8,072,264 |
Amplifying device The present invention concerns a composite amplifier and a method for controlling the amplitude of a composite amplifier in a node of a wireless communication... |
| US-8,072,263 |
Power control device for a signal with optimized input dynamics A signal power control device comprises two amplification channels. A first amplification channel comprises a first transconductance amplifier and a second... |
| US-8,072,262 |
Low input bias current chopping switch circuit and method A chopper-stabilized circuit (1) includes pre-chopping circuitry (26) for chopping an input signal (Vin) at a first frequency to generate a first signal. Input... |
| US-8,072,261 |
Power amplifier A power amplifier based on EER technology or ET technology extracts an amplitude-modulated component from a modulated signal as an input signal which includes... |
| US-8,072,260 |
Configurable clock network for programmable logic device In a programmable logic device having high-speed serial interface channels, a clock distribution network for providing one or more high-speed clocks to dynamic... |
| US-8,072,259 |
Voltage reference and supply voltage level detector circuits using
proportional to absolute temperature cells N-channel field effect transistor Proportional To Absolute Temperature (N-PTAT) cells are connected to a first supply voltage and P-channel field effect... |
| US-8,072,258 |
Booster circuit In a booster circuit which is operated with a two-phase clock and in which a plurality of (M.gtoreq.4) lines of boosting cells constitute a unit, a boosting... |
| US-8,072,257 |
Charge pump-type voltage booster circuit and semiconductor integrated
circuit device A booster circuit includes first and second transistors, a first capacitor, a first drive circuit, a second capacitor, a first controller, and a second... |
| US-8,072,256 |
Dynamic random access memory and boosted voltage producer therefor A dynamic random access memory (DRAM) is selectively operable in a sleep mode and another mode. The DRAM has data storage cells that are refreshed in the... |
| US-8,072,255 |
Quadrature radio frequency mixer with low noise and low conversion loss In one embodiment of the invention, a method for convolution of signals is disclosed including generating four phased half duty cycle clocks each being out of... |
| US-8,072,254 |
Delay cell and phase locked loop using the same A phase locked loop that generates an internal clock by controlling a delay time of a delay cell according to conditions of PVT, thereby improving a jitter... |
| US-8,072,253 |
Clock adjusting circuit and semiconductor integrated circuit device Disclosed is a clock adjusting circuit comprising a phase shifter that receives a clock signal and variably shifts, based on a control signal, respective timing... |
| US-8,072,252 |
Compound logic flip-flop having a plurality of input stages A compound logic flip-flop. The flip-flop includes a plurality of input stages, wherein each of the input stages is coupled to receive at least one input signal... |
| US-8,072,251 |
Latch circuit and electronic device A latch circuit includes: four or more gates; three input terminals and one or two output terminals which are connected to at least one of the four or more... |
| US-8,072,250 |
Reset signal distribution Methods, circuits and systems may operate to generate a reset signal at an input reset block and synchronously distribute the reset signal, via a number of... |
| US-8,072,249 |
Clock jitter compensated clock circuits and methods for generating jitter
compensated clock signals Clock circuits, memories and methods for generating a clock signal are described. One such clock circuit includes a delay locked loop (DLL) configured to... |
| US-8,072,248 |
Method and apparatus for improving accuracy of signals delay A delay module, a delay method, a clock detection apparatus, and a digital locked loop (DLL) are disclosed. The delay module includes a first delay unit, a... |
| US-8,072,247 |
Programmable voltage regulator A circuit in accordance with one embodiment of the invention can include a variable voltage generator that is coupled to receive an input voltage. Furthermore,... |
| US-8,072,246 |
Switching power supply device, semiconductor integrated circuit device and
power supply device A switching power supply device performs a stable operation with fast response for a semiconductor integrated circuit device. A capacitor is provided between... |
| US-8,072,245 |
dB-linear voltage-to-current converter A dB-linear voltage-to-current (V/I) converter that is amenable to implementation in CMOS technology. In a representative embodiment, the dB-linear V/I... |
| US-8,072,244 |
Current sensing amplifier and method thereof The present invention relates to a current sensing amplifier and a method thereof. The current sensing amplifier comprises a first current path, a second... |
| US-8,072,243 |
Semiconductor device with transistors having substantial the same
characteristic variations A semiconductor device is provided. The semiconductor device includes a first circuit provided between a power source voltage line and a ground line, including... |
| US-8,072,242 |
Merged programmable output driver Embodiments provide input/output devices having programmable logic that is programmable to operate input/output devices in one of two drive modes. In various... |
| US-8,072,241 |
Semiconductor device having diode-built-in IGBT and semiconductor device
having diode-built-in DMOS A semiconductor device includes: a semiconductor substrate; a diode-built-in insulated-gate bipolar transistor having an insulated-gate bipolar transistor and a... |
| US-8,072,240 |
Die apparatus having configurable input/output and control method thereof A metal configurable I/O structure for an integrated circuit is disclosed. The metal configurable I/O structure may be configured for one of any of a plurality... |
| US-8,072,239 |
Element controller for a resilient integrated circuit architecture The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element... |
| US-8,072,238 |
Programmable logic device architecture with the ability to combine
adjacent logic elements for the purpose of... A high efficiency PLD architecture having logic elements that can be selectively combined to perform higher order logic functions than can be performed alone by... |
| US-8,072,237 |
Computer-aided design tools and memory element power supply circuitry for
selectively overdriving circuit blocks Integrated circuits are provided with circuitry such as multiplexers that can be selectively configured to route different adjustable power supply voltages to... |
| US-8,072,236 |
Download sequencing techniques for circuit configuration data Methods, systems, and devices are described for the implementation of a novel architecture to support download sequencing techniques for circuit configuration... |
| US-8,072,235 |
Integrated circuit with configurable on-die termination Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the... |
| US-8,072,234 |
Micro-granular delay testing of configurable ICs A method for testing a set of circuitry in an integrated circuit (IC) is described. The IC includes multiple configurable circuits for configurably performing... |
| US-8,072,233 |
Method and apparatus for monitoring via's in a semiconductor fab A method for monitoring a semiconductor fabrication process creates a wafer of semiconductor chips. Each chip has a one or more diodes. Each diode is... |
| US-8,072,232 |
Test apparatus that tests a device under test having a test function for
sequentially outputting signals Provided is a test apparatus that tests a device under test having a test function for sequentially outputting, from a single test terminal, signals that would... |
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