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| Patent # | Description |
|---|---|
| US-8,071,480 |
Method and apparatuses for removing polysilicon from semiconductor
workpieces Methods and apparatuses for removing polysilicon material from a semiconductor workpiece are disclosed. A particular method includes contacting a polishing pad... |
| US-8,071,479 |
Chemical mechanical polishing composition and methods relating thereto A method for chemical mechanical polishing of a substrate comprising a barrier material in the presence of at least one of an interconnect metal and a low-k... |
| US-8,071,478 |
Method of depositing tungsten film with reduced resistivity and improved
surface morphology A method of controlling the resistivity and morphology of a tungsten film is provided, comprising depositing a first film of a bulk tungsten layer on a... |
| US-8,071,477 |
Method of manufacturing semiconductor device and substrate processing
apparatus Formation of a boron compound is suppressed on the inner wall of a nozzle disposed in a high-temperature region of a process chamber. A semiconductor device... |
| US-8,071,476 |
Cobalt titanium oxide dielectric films Electronic apparatus and methods of forming the electronic apparatus include a cobalt titanium oxide film on a substrate for use in a variety of electronic... |
| US-8,071,475 |
Liner for tungsten/silicon dioxide interface in memory A semiconductor wafer assembly includes a base of dielectric. A layer of silicon is deposited thereover. A metal hard mask is deposited over the silicon. A... |
| US-8,071,474 |
Method of manufacturing semiconductor device suitable for forming wiring
using damascene method (a1) A concave portion is formed in an interlayer insulating film formed on a semiconductor substrate. (a2) A first film of Mn is formed by CVD, the first film... |
| US-8,071,473 |
Semiconductor device manufacturing method and storage medium An object of the present invention is to obtain a favorable etching shape in etching an organic film formed on a substrate. A semiconductor device manufacturing... |
| US-8,071,472 |
Semiconductor device with solder balls having high reliability A semiconductor device includes a substrate, a metal layer, an alloy layer and a Sn--Ag--Cu-based solder ball. The metal layer is configured to be formed on the... |
| US-8,071,471 |
Packaging conductive structure and method for manufacturing the same A packaging conductive structure for a semiconductor substrate and a method for manufacturing the structure are provided. The structure comprises an under bump... |
| US-8,071,470 |
Wafer level package using stud bump coated with solder A method of fabricated a wafer level package is described. In one embodiment, the method includes fabricating at least one active device on a semiconductor... |
| US-8,071,469 |
Semiconductor device and method of fabricating the same A semiconductor device having increased reliability includes a fuse region and a monitoring region. Fuses are located on an insulation film in the fuse region... |
| US-8,071,468 |
Semiconductor device and method of manufacturing semiconductor device There is provided a method of manufacturing a semiconductor device, the method including performing at least one of: processing, when forming the first... |
| US-8,071,467 |
Methods of forming patterns, and methods of forming integrated circuits Some embodiments include methods of forming patterns in substrates by utilizing block copolymer assemblies as patterning materials. A block copolymer assembly... |
| US-8,071,466 |
Zinc sulfide crystals for optical components Zinc sulfide (ZnS) single crystals and multi-grain ZnS crystals are suitable for many applications. The disclosed method produces ZnS single crystals or... |
| US-8,071,465 |
Method for producing semiconductor chip with adhesive film, adhesive film
for semiconductor used in the method,... A method for producing a semiconductor chip with an adhesive film, which includes: preparing a laminate in which a semiconductor wafer, an adhesive film and a... |
| US-8,071,464 |
Manufacturing method for light emitting device A light emitting device manufacturing method including the steps of corrugatedly scanning a laser beam along a plurality of division lines formed on a light... |
| US-8,071,463 |
Method and structure for fabricating multiple tiled regions onto a plate
using a controlled cleaving process A reusable transfer substrate member for forming a tiled substrate structure. The member including a transfer substrate, which has a surface region. The surface... |
| US-8,071,462 |
Isolation structures for integrated circuits and modular methods of
forming the same A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with... |
| US-8,071,461 |
Low loss substrate for integrated passive devices Electronic elements (44, 44', 44'') having an active device region (46) and integrated passive device (IPD) region (60) on a common substrate (45) preferably... |
| US-8,071,460 |
Method for manufacturing semiconductor device In a method of manufacturing a semiconductor device, a first film is formed directly on a semiconductor substrate and a second film is formed on the first film.... |
| US-8,071,459 |
Method of sealing an air gap in a layer of a semiconductor structure and
semiconductor structure A method of sealing an air gap in a layer of a semiconductor structure comprises providing a first layer of the semiconductor structure having at least one air... |
| US-8,071,458 |
Method for forming an interfacial passivation layer on the Ge
semiconductor The invention discloses a method for forming an interfacial passivation layer on the Ge semiconductor. The supercritical CO.sub.2 fluids is used to form an... |
| US-8,071,457 |
Low capacitance precision resistor A precision low capacitance resistor is formed, e.g., in a bulk substrate. An embodiment includes forming a source/drain region on a substrate, patterning a... |
| US-8,071,456 |
Semiconductor device and method of manufacturing the same Any of a plurality of contact plugs which reaches a diffusion layer serving as a drain layer of an MOS transistor has an end provided in contact with a lower... |
| US-8,071,455 |
Isolation structures for preventing photons and carriers from reaching
active areas and methods of formation Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep,... |
| US-8,071,454 |
Method for manufacturing dielectric isolation type semiconductor device A method for manufacturing a dielectric isolation type semiconductor device comprises: forming a plurality of trenches in a first region on a major surface of a... |
| US-8,071,453 |
Method of ONO integration into MOS flow A method of ONO integration of a non-volatile memory device (e.g. EEPROM, floating gate FLASH and SONOS) into a baseline MOS device (e.g. MOSFET) is described.... |
| US-8,071,452 |
Atomic layer deposition of hafnium lanthanum oxides There is provided an improved method for depositing thin films using precursors to deposit binary oxides by atomic layer deposition (ALD) techniques. Also... |
| US-8,071,451 |
Method of doping semiconductors A method of doping a semiconductor body is provided herein. In one embodiment, a semiconductor body is exposed to an activated hydrogen gas for a predetermined... |
| US-8,071,450 |
Method for forming voltage sustaining layer with opposite-doped islands
for semiconductor power devices A method of manufacturing a semiconductor device includes preparing a semiconductor wafer with a substrate of a first conductivity type and forming a first... |
| US-8,071,449 |
Semiconductor storage device and method for manufacturing the same A semiconductor storage device has a plurality of word lines formed with a predetermined interval on a semiconductor substrate, a selection transistor provided... |
| US-8,071,448 |
Semiconductor device and manufacturing method of the same A disclosed semiconductor device includes multiple gate electrodes disposed on a semiconductor substrate; and multiple sidewall spacers disposed on sidewalls of... |
| US-8,071,447 |
Semiconductor device manufacturing method A semiconductor device manufacturing method includes removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of... |
| US-8,071,446 |
Manufacturing method of semiconductor device and substrate processing
apparatus A manufacturing method of a semiconductor device, including the steps of: loading into a processing chamber a substrate having a high dielectric gate insulating... |
| US-8,071,445 |
Method for manufacturing semiconductor device, and semiconductor device In a transistor region, a source interconnect layer and a gate electrode are buried in trenches. A source extending region is provided adjacent to the... |
| US-8,071,444 |
Nonvolatile semiconductor memory and method of manufacturing the same A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor... |
| US-8,071,443 |
Method of forming lutetium and lanthanum dielectric structures Methods of forming dielectric structures are shown. Methods of forming dielectric structures are shown that include lutetium oxide and lanthanum aluminum oxide... |
| US-8,071,442 |
Transistor with embedded Si/Ge material having reduced offset to the
channel region A strain-inducing semiconductor alloy may be formed on the basis of cavities which may have a non-rectangular shape, which may be maintained even during... |
| US-8,071,441 |
Methods of forming DRAM arrays Some embodiments include methods of forming transistor gates. A gate stack is placed within a reaction chamber and subjected to at least two etches, and to one... |
| US-8,071,440 |
Method of fabricating a dynamic random access memory A method of fabricating a dynamic random access memory is provided. First, a substrate at least having a memory device area and a peripheral device area is... |
| US-8,071,439 |
Method for manufacturing semiconductor device A method for manufacturing a semiconductor device includes forming a first interlayer insulating film over a semiconductor substrate; forming a first opening in... |
| US-8,071,438 |
Semiconductor circuit A semiconductor memory device includes a substrate and an interconnect region carried by the substrate. A donor layer is coupled to the interconnect region... |
| US-8,071,437 |
Method of fabricating efuse, resistor and transistor A method of fabricating an efuse, a resistor and a transistor includes the following steps: A substrate is provided. Then, a gate, a resistor and an efuse are... |
| US-8,071,436 |
Method of fabricating a semiconductor device having a lateral double
diffused MOSFET transistor with a lightly... Methods and systems for monolithically fabricating a lateral double-diffused MOSFET (LDMOS) transistor having a source, drain, and a gate on a substrate, with a... |
| US-8,071,435 |
Manufacture of semiconductor device with stress structure A method for manufacturing a semiconductor device includes the steps of (a) forming a gate electrode on a silicon substrate, through a gate insulating film; (b)... |
| US-8,071,434 |
Method of fabricating a thin film transistor using boron-doped oxide
semiconductor thin film Provided is a method of fabricating a thin film transistor including source and drain electrodes, a novel channel layer, a gate insulating layer, and a gate... |
| US-8,071,433 |
Semiconductor component with surface mountable devices and method for
producing the same A semiconductor component including: a substrate, at least one semiconductor chip arranged on the substrate and at least one passive device likewise arranged on... |
| US-8,071,432 |
Organic transistor active substrate, manufacturing method thereof, and
electrophoretic display A method of manufacturing an organic transistor active substrate is disclosed. The organic transistor active substrate includes an organic transistor in which a... |
| US-8,071,431 |
Overmolded semiconductor package with a wirebond cage for EMI shielding According to one exemplary embodiment, an overmolded package includes a component situated on a substrate. The overmolded package further includes an overmold... |
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