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Patent # Description
US-8,076,229 Methods of forming data cells and connections to data cells
Disclosed are methods and devices, among which is a method that includes forming a lower conductive material on a substrate, forming a stop material on the...
US-8,076,228 Low noise transistor and method of making same
A low noise transistor and a method of making a low noise transistor. A noise-reducing agent is introduced into the gate electrode and then moved into the gate...
US-8,076,227 Electroactive polymers for lithography
Systems and methods for lithography include actuating an electroactive polymer member to position mask and/or substrate.
US-8,076,226 Apparatus for annealing, method for annealing, and method for manufacturing a semiconductor device
An apparatus for annealing a substrate includes a substrate stage having a substrate mounting portion configured to mount the substrate; a heat source having a...
US-8,076,225 Solid-state image capturing device, manufacturing method for the same and electronic information device
A method for manufacturing a solid-state image capturing device according to the present invention, in which from a plurality of light receiving sections for...
US-8,076,224 Thin-film deposition and recirculation of a semi-conductor material
A process for coating a substrate at atmospheric pressure is disclosed, the process comprising the steps of vaporizing a mass of semiconductor material within a...
US-8,076,223 Method for producing semiconductor substrate
The present invention is a method for producing a semiconductor substrate, including steps of forming a SiGe gradient composition layer and a SiGe constant...
US-8,076,222 Microcrystalline silicon thin film transistor
Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a...
US-8,076,221 Fabrication method of pixel structure and thin film transistor
A method of fabricating a thin film transistor is disclosed. First, a substrate is provided and a patterned polysilicon layer is formed on the substrate. A...
US-8,076,220 Fabrication method for device structure having transparent dielectric substrate
A semiconductor device has a transparent dielectric substrate such as a sapphire substrate. To enable fabrication equipment to detect the presence of the...
US-8,076,219 Reduction of watermarks in HF treatments of semiconducting substrates
A process for reducing or suppressing the appearance of watermarks in a hydrophobic surface of a semiconductor substrate prepared as a base substrate for...
US-8,076,218 Method for the production of photo-patterned carbon electronics
A method for the manufacture of carbon based electrical components is herein presented. In the method a wafer substrate is provided upon which a first layer of...
US-8,076,217 Controlled quantum dot growth
The present disclosure generally relates to techniques for controlled quantum dot growth as well as a quantum dot structures. In some examples, a method is...
US-8,076,216 Methods and apparatus for thinning, testing and singulating a semiconductor wafer
A wafer translator is provided with a patterned layer of wafer bonding thermoset plastic and is removably attached with a wafer so as to form a wafer/wafer...
US-8,076,215 Method of forming an electronic device using a separation technique
A method of forming an electronic device can include forming a patterned layer adjacent to a side of a substrate including a semiconductor material. The method...
US-8,076,214 Display substrate and method of manufacturing the same
A display substrate includes a signal line, a thin-film transistor ("TFT"), a key pattern, a light-blocking pattern, a color filter, a pixel electrode and an...
US-8,076,213 Method for fabricating a metal-insulator-metal capacitor
A method for fabricating a metal-insulator-metal (MIM) capacitor includes providing a substrate comprising a bottom electrode, forming a dielectric layer...
US-8,076,212 Semiconductor device and method for manufacturing the same
According to the method for manufacturing a semiconductor device, a surface of a lower insulating film (55) is planarized by CMP or the like, and an upper...
US-8,076,211 Fabricating bipolar junction select transistors for semiconductor memories
A bipolar junction transistor may act as a select device for a semiconductor memory. The bipolar junction transistor may be formed of a stack of base and...
US-8,076,210 Method for fabricating metal-oxide semiconductor transistors
A method for fabricating a metal-oxide semiconductor transistor is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a...
US-8,076,209 Methods for fabricating MOS devices having highly stressed channels
Methods for forming a semiconductor device comprising a silicon-comprising substrate are provided. One exemplary method comprises depositing a polysilicon layer...
US-8,076,208 Method for forming transistor with high breakdown voltage using pitch multiplication technique
Transistors are formed using pitch multiplication. Each transistor includes a source region and a drain region connected by strips of active area material...
US-8,076,207 Gate structure and method of making the same
A method of making a gate structure includes the following steps. First, a gate is formed. Then, a first silicon oxide layer, a silicon nitride layer, and a...
US-8,076,206 Method for manufacturing SONOS flash memory
A method for manufacturing a semiconductor device which includes steps of forming a dummy layer on a semiconductor substrate, forming a groove 12 in the...
US-8,076,205 Semiconductor memory device and method of fabricating the same
A semiconductor memory includes a memory cell array area provided with first and second memory cells and having a first active area and a first element...
US-8,076,204 Graphene-based transistor
A graphene layer is formed on a surface of a silicon carbide substrate. A dummy gate structure is formed over the fin, in the trench, or on a portion of the...
US-8,076,203 Semiconductor device and method of manufacturing the same
A polysilicon film is formed all over a surface of a semiconductor substrate, then is subject to a CMP process through a mask pattern as a stopper. Then, a...
US-8,076,202 Method of fabricating semiconductor device
In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of...
US-8,076,201 Method of manufacturing flash memory device
A method of manufacturing a flash memory device according to an embodiment includes forming a second oxide layer pattern having a mask pattern buried therein on...
US-8,076,200 Charge trapping dielectric structures with variable band-gaps
A nonvolatile read-only memory having a thin nitrided tunnel insulator surface with a charge blocking insulator over the nitrided surface is presented. The...
US-8,076,199 Method and device employing polysilicon scaling
A memory and method of manufacture employing word line scaling. A layered stack, including a charge trapping component and a core polysilicon layer, is formed...
US-8,076,198 Method of fabricating nonvolatile memory device
A method of fabricating a nonvolatile memory device with a three-dimensional structure includes alternately stacking first and second material layers in two or...
US-8,076,197 Image sensor and method for fabricating the same
A CMOS image sensor includes a substrate including silicon, a silicon germanium (SiGe) epitaxial layer formed over the substrate, the SiGe epitaxial layer...
US-8,076,196 Semiconductor device and fabrication method for the same
The semiconductor device includes: memory cells each having a first multilayer electrode including a first lower electrode made of a first conductive film and a...
US-8,076,195 Resistive memory architectures with multiple memory cells per access device
A resistive memory structure, for example, phase change memory structure, includes one access device and two or more resistive memory cells. Each memory cell is...
US-8,076,194 Method of fabricating metal oxide semiconductor transistor
A method of fabricating a MOS transistor is disclosed. The method includes the steps of: providing a semiconductor substrate; forming at least a gate on the...
US-8,076,193 CMOS device fabrication method with PMOS interface insulating film formed concurrently with sidewall insulating...
According to one aspect of the invention, there is provided a semiconductor device fabrication method comprising: forming a first gate electrode via a first...
US-8,076,192 Method of manufacturing a semiconductor device
Provided is a manufacturing method of a semiconductor device, which comprises forming a film stack of a gate insulating film, a charge storage film, insulating...
US-8,076,191 Method for manufacturing a semiconductor device including memory cell formation region
In processing memory cells for forming a nonvolatile memory in a semiconductor device, a second polysilicon film is formed in such a manner as to cover a first...
US-8,076,190 Sea-of-fins structure on a semiconductor substrate and method of fabrication
A semiconductor device and a method of fabricating a semiconductor device is disclosed, the method comprises including: forming etching an oxide layer to form a...
US-8,076,189 Method of forming a semiconductor device and semiconductor device
A method of forming a semiconductor device comprises forming a control electrode over a portion of a semiconductor layer, forming recesses extending into the...
US-8,076,188 Method of manufacturing a semiconductor device
A manufacturing method of a semiconductor device including a protecting element with a p-n junction which can be formed in the same process as that of a...
US-8,076,187 Mask pattern, method of fabricating thin film transistor, and method of fabricating organic light emitting...
A method of fabricating a polycrystalline silicon thin film for a thin film transistor (TFT), a mask pattern used for the method, and a method of fabricating a...
US-8,076,186 Method of laser annealing semiconductor layer and semiconductor devices produced thereby
A laser annealing method includes forming a nitrogen-doped layer on a semiconductor layer, the nitrogen-doped layer having a nitrogen concentration of at least...
US-8,076,185 Integrated circuit protection and ruggedization coatings and methods
An electronics package includes a substrate and at least one electronic component coupled to the substrate. The electronics package comprises an alkali silicate...
US-8,076,184 Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded...
A semiconductor device has a base carrier with first and second opposing surfaces. A plurality of cavities and base leads between the cavities is formed in the...
US-8,076,183 Method of attaching an interconnection plate to a semiconductor die within a leadframe package
A method is disclosed for attaching an interconnection plate to semiconductor die within leadframe package. A base leadframe is provided with die pad for...
US-8,076,182 Method of making a semiconductor chip assembly with a post/base heat spreader and a cavity over the post
A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post into an...
US-8,076,181 Lead plating technique for singulated IC packages
A packaging technique is described for QFNs, DFN, and other surface mount packages that allows the sides of leads to be plated with a wettable metal prior to...
US-8,076,180 Repairable semiconductor device and method
Repairable semiconductor device and method. In one embodiment a method, provides a first body having a first semiconductor chip and a first metal layer. A...
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