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Patent # Description
US-8,084,375 Hot edge ring with sloped upper surface
A hot edge ring with extended lifetime comprises an annular body having a sloped upper surface. The hot edge ring includes a step underlying an outer edge of a...
US-8,084,374 Tuning of photo-absorption materials through use of magnetic fields
The disclosure relates to using magnetic fields for the purposes of modifying the absorption characteristics of materials, such as semiconductor materials, to...
US-8,084,373 Manufacturing method of semiconductor device for enhancing the current drive capability
A manufacturing method of a semiconductor device is provided which can uniformly form a good and thin silicon oxide film or the like at a relatively low...
US-8,084,372 Substrate processing method and computer storage medium
In the present invention, a coating solution containing polysilazane is applied to a substrate to form a coating film. Thereafter, an ultraviolet ray is applied...
US-8,084,371 Field effect transistors, methods of fabricating a carbon-insulating layer using molecular beam epitaxy and...
Field effect transistors, methods of fabricating a carbon insulating layer using molecular beam epitaxy and methods of fabricating a field effect transistor...
US-8,084,370 Hafnium tantalum oxynitride dielectric
Electronic apparatus and methods may include a hafnium tantalum oxynitride film on a substrate for use in a variety of electronic systems. The hafnium tantalum...
US-8,084,369 Producing method of semiconductor device and substrate processing apparatus
Disclosed is a producing method of a semiconductor device produced by transferring a plurality of substrates into a processing chamber, supplying...
US-8,084,368 Method of forming barrier film
A barrier film made of a ZrB.sub.2 film is formed by use of a coating apparatus provided with plasma generation means including a coaxial resonant cavity and a...
US-8,084,367 Etching, cleaning and drying methods using supercritical fluid and chamber systems using these methods
Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes...
US-8,084,366 Modified DARC stack for resist patterning
A method of making a device includes forming a device layer, forming an organic hard mask layer over the device layer, forming a first oxide hard mask layer...
US-8,084,365 Method of manufacturing a nano structure by etching, using a substrate containing silicon
A method of manufacturing a nano structure by etching, using a substrate containing Si. A focused Ga ion or In ion beam is irradiated on the surface of the...
US-8,084,364 Method of fabricating semiconductor device
A method of fabricating a semiconductor device, includes forming an amorphous silicon film above a semiconductor substrate, partially removing the amorphous...
US-8,084,363 Polishing slurry and polishing method
The present invention relates to polishing slurry and polishing method used for polishing in a process for forming wirings of a semiconductor device, and the...
US-8,084,362 Polishing slurry and polishing method
The present invention relates to polishing slurry and polishing method used for polishing in a process for forming wirings of a semiconductor device, and the...
US-8,084,361 Semiconductor fabrication method suitable for MEMS
A method includes depositing a layer of a sacrificial material in a first region above a substrate. The first region of the substrate is separate from a second...
US-8,084,360 Method of manufacturing semiconductor device
In one embodiment, a method of manufacturing a semiconductor device includes forming a first film containing boron (B) on a member to be etched, the member...
US-8,084,359 Semiconductor package and methods of manufacturing the same
A semiconductor package includes a semiconductor chip having first and second pads, a first insulation layer pattern formed on the semiconductor chip and having...
US-8,084,358 Semiconductor device and manufacturing method thereof
In a manufacturing method of a semiconductor device, an insulating film is formed on a first conductive film. By using a mask film having an opening that...
US-8,084,357 Method for manufacturing a dual damascene opening comprising a trench opening and a via opening
A method for manufacturing a multi cap layer includes providing a substrate, forming a multi cap layer comprising a first cap layer and a second cap layer...
US-8,084,356 Methods of low-K dielectric and metal process integration
An integrated process for forming metallization layers for electronic devices that use damascene structures that include low-k dielectric and metal. According...
US-8,084,355 Methods of forming copper-comprising conductive lines in the fabrication of integrated circuitry
A method of forming copper-comprising conductive lines in the fabrication of integrated circuitry includes depositing damascene material over a substrate. Line...
US-8,084,354 Method of fabricating a metal cap layer with enhanced etch resistivity for copper-based metal regions in...
During the fabrication of sophisticated metallization systems of semiconductor devices, material deterioration of conductive cap layers may be significantly...
US-8,084,353 Methods for pitch reduction formation
Methods and apparatus for providing a memory array fabrication process that concurrently forms memory array elements and peripheral circuitry. The invention...
US-8,084,352 Method of manufacturing semiconductor device
A high-density N-type diffusion layer 116 formed in a separation area 115 makes it possible to reduce a collector current flowing through a parasitic NPN...
US-8,084,351 Contact structure of a semiconductor device
A method for fabricating a contact of a semiconductor device includes the steps of forming a dielectric layer having a contact hole on a semiconductor...
US-8,084,350 Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device includes can prevent defects of a semiconductor device due to the deterioration of electro migration...
US-8,084,349 Method for forming post bump
Disclosed is a method for forming post bumps, the method including the steps of: forming a seed layer for metal plating on a substrate; forming a resist layer...
US-8,084,348 Contact pads for silicon chip packages
A method for manufacturing a silicon chip package for a circuit board assembly provides a package with a silicon chip and an array of first contact pads that...
US-8,084,347 Resist feature and removable spacer pitch doubling patterning method for pillar structures
A method of making a semiconductor device includes forming at least one layer over a substrate, forming at least two spaced apart features of imagable material...
US-8,084,346 Replacement metal gate method
A method includes forming a dummy gate in a dielectric layer on a substrate, the dummy gate including a sacrificial oxide layer and a dummy gate body over the...
US-8,084,345 Methods of forming dispersions of nanoparticles, and methods of forming flash memory cells
Some embodiments include methods of forming dispersions of nanoparticles. The nanoparticles are incorporated into first coordination complexes in which the...
US-8,084,344 Methods of fabricating a semiconductor device
A method of fabricating a contact plug of a semiconductor device is provided, the method includes forming a gate pattern on a substrate, forming a capping...
US-8,084,343 Semiconductor device
In order to block hydrogen ions produced when forming an interlayer insulating film by HDP-CVD or the like to thereby suppress an adverse effect of the hydrogen...
US-8,084,342 Method of manufacturing a CMOS device with zero soft error rate
A CMOS device and method of manufacture is provided for producing an integrated circuit that is not susceptible to various soft errors such as single-event...
US-8,084,341 Semiconductor device and method for manufacturing the same
The present invention provides a method for manufacturing a semiconductor device which includes a step of forming one optional impurity region in a ...
US-8,084,340 Method of manufacturing semiconductor device and semiconductor device
A method of manufacturing a semiconductor device whereby, even in cases where ions are implanted into a shallow region of a semiconductor substrate when a deep...
US-8,084,339 Remote plasma processing of interface surfaces
Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For...
US-8,084,338 Semiconductor device and manufacturing method thereof
The depletion of a gate electrode (103) is suppressed in such a way that impurities are introduced into the gate electrode that is formed on a semiconductor...
US-8,084,337 Growth of III-V compound semiconductor nanowires on silicon substrates
The present invention relates to growth of III-V semiconductor nanowires (2) on a Si substrate (3). Controlled vertical nanowire growth is achieved by a step,...
US-8,084,336 Oscillator apparatus
An apparatus including a resonator electrode and a second electrode separated from the resonator electrode by a gap having a size that facilitates electron...
US-8,084,335 Method of thinning a semiconductor wafer using a film frame
A method for manufacturing a thin semiconductor wafer. A semiconductor wafer is thinned from its backside followed by the formation of a cavity in a central...
US-8,084,334 Semiconductor device manufacturing method comprising a metal pattern and laser modified regions in a cutting region
To divide a semiconductor wafer by stealth dicing, a test pad in a cutting region and an alignment target are collectively arranged along one side in a width...
US-8,084,333 Object cutting method
An object cutting method which can reliably remove particles remaining on cut sections of chips is provided. An expandable tape 23 is electrically charged in a...
US-8,084,332 Method of fabrication of AI/GE bonding in a wafer packaging environment and a product produced therefrom
A method of bonding of germanium to aluminum between two substrates to create a robust electrical and mechanical contact is disclosed. An aluminum-germanium...
US-8,084,331 Method of treating semiconductor element
In a method of treating a semiconductor element which at least includes a semiconductor, a threshold voltage of the semiconductor element is changed by...
US-8,084,330 Thin body semiconductor devices having improved contact resistance and methods for the fabrication thereof
Embodiments of a method for fabricating a semiconductor device are provided. In one embodiment, the method includes the step of producing a partially-completed...
US-8,084,329 Transistor devices and methods of making
In an embodiment, a method of fabricating a transistor device comprises: providing a semiconductor topography comprising a gate conductor disposed above a...
US-8,084,328 Semiconductor device including I/O oxide nitrided core oxide on substrate
A semiconductor device includes a semiconductor substrate, wherein the semiconductor substrate includes a core area for core circuits and a peripheral area for...
US-8,084,327 Method for forming trench gate field effect transistor with recessed mesas using spacers
A method for forming a field effect transistor with an active area and a termination region surrounding the active area includes forming a well region in a...
US-8,084,326 Method for manufacturing semiconductor device
The present invention relates to a method for manufacturing a semiconductor device, and provides to reduce a contact resistance of a landing plug by forming the...
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