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| Patent # | Description |
|---|---|
| US-8,130,058 |
Switchable tunable acoustic resonator using BST material An acoustic resonator includes a first electrode, a second electrode, and a barium strontium titanate (BST) dielectric layer disposed between the first... |
| US-8,130,057 |
Lumped cross-coupled Wilkinson circuit The present invention relates to a lumped cross-coupled Wilkinson circuit having a pair of magnetically cross-coupled inductive elements coupled to an isolation... |
| US-8,130,056 |
Thermometer coded attenuator Techniques are disclosed that allow for programmable attenuation using thermometer code steps. By thermometer coding the attenuator structure, monotonicity is... |
| US-8,130,055 |
High-frequency device and high-frequency circuit used therein A high-frequency device having a high-frequency circuit comprising a high-frequency amplifier, and an output-matching circuit receiving high-frequency power... |
| US-8,130,054 |
Frequency-adjustable radio frequency isolator circuitry The present invention relates to a frequency-adjustable radio frequency (RF) isolator that may operate as a bandpass filter when processing RF signals in a... |
| US-8,130,053 |
Tank tuning for band pass filter used in radio communications A tuning method and circuit for an LC tank resonant circuit, including an inductor and a variable capacitor, are described. In a tuning mode, an RF input signal... |
| US-8,130,052 |
Semiconductor circuit board and semiconductor circuit The present invention is intended to efficiently implement noise countermeasures for a semiconductor circuit board and for a semiconductor circuit. The present... |
| US-8,130,051 |
Method and system for varactor linearization Aspects of a method and system for varactor linearization are provided. In this regard, a relationship between control voltage and capacitance of a variable... |
| US-8,130,050 |
Dual table temperature compensated voltage controlled crystal oscillator
system and method Dual table temperature compensation for a voltage controlled crystal oscillator is achieved by sensing the temperature of the voltage controlled crystal... |
| US-8,130,049 |
Submillimeter-wave signal generation by linear superimposition of
phase-shifted fundamental tone signals Generation of Terahertz range (300 GHz to 3 THz) frequencies is increasingly important for communication, imaging and spectroscopic systems, including concealed... |
| US-8,130,048 |
Local oscillator Equal numbers of variable capacitance elements, capacitance values of which are separately controlled according to a logic value of a corresponding bit of a... |
| US-8,130,047 |
Open loop coarse tuning for a PLL In many types of wireless applications (like wireless modems), it is important that the phase locked loops (PLLs) be able to synthesize clock frequencies in a... |
| US-8,130,046 |
Frequency calibration of radio frequency oscillators A wireless communication device incorporating a set of comparators and logic interrupt into the local oscillator generation circuit block is described. In one... |
| US-8,130,045 |
Digital self excited loop A process that provides the ability to incorporate a self exciting loop (SEL) algorithm into a digital LLRF system. The present digital SEL provides for... |
| US-8,130,044 |
Phase-locked loop circuitry with multiple voltage-controlled oscillators Configurable phase-locked loop circuitry is provided. The phase-locked loop circuitry may include a buffer having a buffer output and a multiplexer having... |
| US-8,130,043 |
Multi-stage power amplifier with enhanced efficiency A multi-stage RF/Microwave power amplifier circuit is provided that is capable of operating efficiently at multiple output power levels. The amplifier comprises... |
| US-8,130,042 |
Methods and devices for leakage current reduction Methods and devices for leakage current reduction are described. A regulator transistor is connected to a switch to bias the transistor with a first voltage... |
| US-8,130,041 |
Power amplifier device Provided is a power amplifier device. The power amplifier device includes: a cutoff unit cutting off a direct current (DC) component of a signal delivered from... |
| US-8,130,040 |
Power amplifier with two transistors and traces forming two transformers Methods to implement low cost, high efficiency, low loss power combiner with novel matching circuits are disclosed. A narrow band power combiner enables a high... |
| US-8,130,039 |
Solid-state RF power amplifier for radio transmitters An RF power amplifier includes a first amplifier module comprising a first push-pull amplifier including a first plurality of field effect transistors and a... |
| US-8,130,038 |
Class AB operational amplifier and output stage quiescent current control
method A class AB operational amplifier includes: a first transistor, for generating a first current; a second transistor, where a second source voltage of the second... |
| US-8,130,037 |
Apparatus and method for reducing current noise An input bias current cancellation circuit includes reference transistors placed in series and a current summation network. The current summation network can be... |
| US-8,130,036 |
Input common mode circuit A circuit provides a first current corresponding to the differential input Inn and Inp, and a second current corresponding to the common mode input Vcm. The... |
| US-8,130,035 |
Post amplifier with selectable gain A selectable gain amplifier includes two or more selectable gain stages, each gain stage having a first input coupled to receive an input signal, a second... |
| US-8,130,034 |
Rail-to-rail amplifier A rail-to-rail amplifier includes an NMOS type amplification unit configured to perform an amplification operation on differential input signals in a domain in... |
| US-8,130,033 |
Switching low noise amplifier Disclosed are embodiments of an integrated circuit device, method and design structure for selectively amplifying one of multiple received input signals. The... |
| US-8,130,032 |
Systems and methods for high-sensitivity detection of input bias current The invention relates to systems and methods for high-sensitivity detection of input bias current. The invention more particularly relates to platforms and... |
| US-8,130,031 |
Tunable metamaterial Examples of the present invention include a metamaterial comprising a plurality of resonators disposed on a substrate, the substrate comprising a dielectric... |
| US-8,130,030 |
Interfacing between differing voltage level requirements in an integrated
circuit system A method includes controllably generating a first bias voltage from a supply voltage to be within an upper tolerable limit of an operating voltage of an IO... |
| US-8,130,029 |
Circuit for switchably connecting an input node and an output node A switching circuit for switchably connecting an input node and an output node. The switching circuit comprises a switch operable to switchably connect the... |
| US-8,130,028 |
CMOS charge pump with improved latch-up immunity A CMOS charge pump with improved latch-up immunity is provided. The CMOS charge pump includes a blocking transistor that disconnects first and second boost... |
| US-8,130,027 |
Apparatus and method for the detection and compensation of integrated
circuit performance variation An apparatus and method for the dynamic detection and compensation of performance variations within an integrated circuit (IC) is provided to detect performance... |
| US-8,130,026 |
Booster circuit and voltage supply circuit A booster circuit includes a pump circuit having a plurality of charge pump circuits for outputting a boosted voltage to a first output terminal. The booster... |
| US-8,130,025 |
Numerical band gap A system includes a bandgap temperature sensor to generate multiple base-emitter voltages. The system also include a controller to detect the base-emitter... |
| US-8,130,024 |
Temperature compensation via power supply modification to produce a
temperature-independent delay in an... A method and circuitry for adjusting the delay of a variable delay line (VDL) in a delay locked loop (DLL) or other delay element or subcircuit on an integrated... |
| US-8,130,023 |
System and method for providing symmetric, efficient bi-directional power
flow and power conditioning A system and method for providing symmetric, efficient bi-directional power flow and power conditioning for high-voltage applications. Embodiments include a... |
| US-8,130,022 |
Ultra-low current push-button switch interface circuit Circuits and methods to achieve a switch interface circuit for a single pole, single throw (SPST) momentary push-button switch consuming a few tens of nanoamps... |
| US-8,130,021 |
Gain control with multiple integrators A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first... |
| US-8,130,020 |
Switched-capacitor decimator A switched-capacitor decimator that can attenuate undesired signal components at odd harmonics of an output sample rate is described. In one design, the... |
| US-8,130,019 |
Clock signal propagation method for integrated circuits (ICs) and
integrated circuit making use of same A method is provided for propagating clock signals in a circuit segment having a first clocked device, a second clocked device and a data path between the first... |
| US-8,130,018 |
Latch module and frequency divider A latch module comprising a sense pair of transistor elements coupled together for sensing a differential input signal at input terminals, a level-shift module... |
| US-8,130,017 |
Semiconductor device having a delay locked loop responsive to skew
information and method for driving the same A delay locked loop includes: a control voltage generator configured to generate a voltage control signal having a voltage level corresponding to a phase... |
| US-8,130,016 |
Techniques for providing reduced duty cycle distortion A feedback loop circuit includes a phase detector and delay circuits. The phase detector generates an output signal based on a delayed periodic signal. The... |
| US-8,130,015 |
Clock generating circuit, semiconductor device including the same, and
data processing system To include a phase determining circuit that generates a first phase determination signal, a sampling circuit that samples the first phase determination signal... |
| US-8,130,014 |
Network and method for setting a time-base of a node in the network A data communication network may, include a first sub-network and a second sub-network. The first sub-network may include two or more two master clocks, and a... |
| US-8,130,013 |
Driving circuit of input/output interface with changeable output force A driving circuit of an input/output (I/O) interface is provided. The driving circuit includes a main output stage and an enhancing unit. The main output stage... |
| US-8,130,012 |
Buffer circuit of semiconductor integrated apparatus A buffer circuit of a semiconductor integrated apparatus includes a control block configured to output a result of comparing an input voltage level and an... |
| US-8,130,011 |
Power IC and driving method thereof A power integration circuit includes: a first transistor having a control electrode connected to a first voltage source to be supplied with a control signal... |
| US-8,130,010 |
Signal lines with internal and external termination Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal... |
| US-8,130,009 |
Dynamic voltage and frequency management In one embodiment, an integrated circuit includes a self calibration unit configured to iterate a test on a logic circuit in the integrated circuit at... |
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