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Patent # Description
US-8,129,857 Semiconductor circuit
A first signal processing circuit performs predetermined signal processing on a first signal to provide a change to a characteristic value thereof, and then...
US-8,129,856 Sensor arrangement and method of supplying power to sensors therein
One aspect of the invention relates to a method of supplying power to a sensor arrangement including a first sensor and at least one second sensor which in each...
US-8,129,855 Portable turbine systems
Novel apparatus and techniques for harnessing wind and/or moving-liquid energy using one or more portable turbine systems are disclosed. One embodiment includes...
US-8,129,854 Ocean wave energy extractor
An ocean wave energy extractor includes a first flotation device that contains a second flotation device and a mechanism for extracting energy. The wave energy...
US-8,129,853 Power converter for use with wind generator
In one embodiment, the present invention includes a turbine to generate mechanical energy from kinetic energy, a generator coupled to the turbine to receive the...
US-8,129,852 Wave and wind power generation
A wave and wind power generation system including a platform and one or more oscillating water columns (OWC's). Included is an airflow control mechanism, a...
US-8,129,851 Wind power generation system and control method thereof
In a wind power generation system, an energy consuming unit is connected to a DC part of a generator-side converter. A shunt circuit is connected between the...
US-8,129,850 Solar wind chime
A solar wind chime having a structure that supports a solar energy system, a electrical subsystem, a cage, and a chime. The solar energy system includes a...
US-8,129,849 Method of making semiconductor package with adhering portion
Disclosed are a semiconductor package and a method of making the same. In the semiconductor package, a substrate and a semiconductor die are covered with and...
US-8,129,848 Light emitting device having a plurality of light emitting cells connected in series and method of fabricating...
Disclosed are a light emitting device having a plurality of light emitting cells connected in series and a method of fabricating the same. The light emitting...
US-8,129,847 Interconnect and method for mounting an electronic device to a substrate
An interconnect for mounting an electronic device to a substrate includes a base layer between the electronic device and the substrate in electrical...
US-8,129,846 Board adapted to mount an electronic device, semiconductor module and manufacturing method therefor, and...
A board adapted to mount an electronic device includes an insulating resin layer, a wiring layer of a predetermined pattern provided on one surface of the...
US-8,129,845 Semiconductor device and method of forming interconnect structure in non-active area of wafer
A semiconductor wafer includes a plurality of semiconductor die. Contact pads are formed on an active area of the semiconductor die and non-active area of the...
US-8,129,844 Method of forming a metal silicide layer, devices incorporating metal silicide layers and design structures for...
Electronic devices and design structures of electronic devices containing metal silicide layers. The devices include: a thin silicide layer between two...
US-8,129,843 Methods to mitigate plasma damage in organosilicate dielectrics using a protective sidewall spacer
Plasma damage in ultra low k dielectric materials during formation of a dual damascene metal interconnect structure is reduced by providing a protective spacer...
US-8,129,842 Enhanced interconnect structure
The present invention provides a semiconductor interconnect structure with improved mechanical strength at the capping layer/dielectric layer/diffusion barrier...
US-8,129,841 Solder joint flip chip interconnection
A flip chip interconnect has a tapering interconnect structure, and the area of contact of the interconnect structure with the site on the substrate...
US-8,129,840 Semiconductor package and methods of manufacturing the same
A semiconductor package and a method of manufacturing the semiconductor package. The semiconductor package include a substrate including a plurality of pads and...
US-8,129,839 Electronic device package structures
A sealing layer is provided on a surface of a substrate, such as a semiconductor wafer. The sealing layer includes apertures which expose external contact...
US-8,129,838 Housed active microstructures with direct contacting to a substrate
A microstructured component with microsensors or other active microcomponent is provided. The microstructured component includes a substrate and at least one...
US-8,129,837 Flip chip interconnection pad layout
A flip chip interconnect pad layout has the die signal pads are arranged on the die surface near the perimeter of the die, and the die power and ground pads...
US-8,129,836 Semiconductor device
A semiconductor device is composed of a pair of semiconductor chips (402, 404) arranged parallel on the same flat plane; a high voltage bus bar (21) bonded on...
US-8,129,835 Package substrate having semiconductor component embedded therein and fabrication method thereof
A package substrate having a semiconductor component embedded therein and a method of fabricating the same are provided, including: providing a semiconductor...
US-8,129,834 Integral metal structure with conductive post portions
A plurality of FPGA dice is disposed upon a semiconductor substrate. In order to supply the immense power required by the plurality of FPGA dice, power is...
US-8,129,833 Stacked integrated circuit packages that include monolithic conductive vias
Microelectronic packages are fabricated by stacking integrated circuits upon one another. Each integrated circuit includes a semiconductor layer having...
US-8,129,832 Mountable integrated circuit package system with substrate having a conductor-free recess
A mountable integrated circuit package system includes: providing a carrier; mounting a first integrated circuit device over the carrier; mounting a substrate...
US-8,129,831 Chip arrangement and method for producing a chip arrangement
A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a...
US-8,129,830 Electronic component package and method of manufacturing the same, and electronic component device
An electronic component package, includes a package substrate portion constructed by a silicon substrate in which a through hole is provided, an insulating...
US-8,129,829 Package substrate having embedded photosensitive semiconductor chip and fabrication method thereof
A packaging substrate with an embedded photosensitive semiconductor chip and a method for fabricating the same are provided. The method includes the steps of:...
US-8,129,828 Wiring substrate with reinforcement
A wiring substrate assembly includes a resin wiring substrate and a reinforcement member. The resin wiring substrate does not have a core substrate, and...
US-8,129,827 Integrated circuit package system with package encapsulation having recess
An integrated circuit package system includes: forming an external interconnect; connecting an integrated circuit die and the external interconnect; forming a...
US-8,129,826 Semiconductor package apparatus having redistribution layer
Provided is a semiconductor package apparatus having a redistribution layer. The apparatus includes at least one or more semiconductor chips, a packing part...
US-8,129,825 IC chip package employing substrate with a device hole
In one embodiment of the present invention, an IC chip mounting package includes a film base member and an IC chip connected via an interposer. Connecting...
US-8,129,824 Shielding for a semiconductor package
A semiconductor device has a substrate. A first die is electrically attached to a first surface of the substrate. A shield spacer having a first and second...
US-8,129,823 Materials, structures and methods for microelectronic packaging
Highly reliable interconnections for microelectronic packaging. In one embodiment, dielectric layers in a build-up interconnect have a gradation in glass...
US-8,129,822 Template for three-dimensional thin-film solar cell manufacturing and methods of use
A template 100 for three-dimensional thin-film solar cell substrate formation for use in three-dimensional thin-film solar cells. The template 100 comprises a...
US-8,129,821 Reacted conductive gate electrodes
A semiconductor device and a method for fabricating a semiconductor device involve a semiconductor layer that includes a first material and a second material....
US-8,129,820 Semiconductor device
A bipolar transistor for semiconductor device has a collector region having a first conductivity type disposed on a surface of a semiconductor substrate having...
US-8,129,819 Method of fabricating integrated circuit including at least six linear-shaped conductive structures at equal...
A layout of a cell of a semiconductor device is disclosed to include a diffusion level layout including a plurality of diffusion region layout shapes, including...
US-8,129,818 Power device
The present invention is a power device includes, a first conductive type semiconductor substrate, a second conductive type base region formed on a surface of...
US-8,129,817 Reducing high-frequency signal loss in substrates
An integrated circuit structure includes a semiconductor substrate of a first conductivity type; and a depletion region in the semiconductor substrate. A deep...
US-8,129,816 Semiconductor device and method of manufacturing the same
A semiconductor device including a semiconductor substrate; an element isolation region formed in the substrate including trenches formed at a first depth and...
US-8,129,815 High-voltage transistor device with integrated resistor
A high-voltage device structure comprises a resistor coupled to a tap transistor that includes a JFET in a configuration wherein a voltage provided at a...
US-8,129,814 Schottky diode with silicide anode and anode-encircling P-type doped region
An integrated circuit includes a Schottky diode having a cathode defined by an n-type semiconductor region, an anode defined by a cobalt silicide region, and a...
US-8,129,813 Optoelectronic sensor and device for 3D distance measurement
The present invention relates to an optoelectronic sensor for 5 demodulating a modulated photon flux (50), and to a measuring device, in particular for 3D...
US-8,129,812 Trench isolation structure and method of formation
In general, the present invention discloses at least one trench isolation region formed in a semiconductor substrate to electrically and/or optically isolate at...
US-8,129,811 Techniques for three-dimensional circuit integration
Integrated circuits having complementary metal-oxide semiconductor (CMOS) and photonics circuitry and techniques for three-dimensional integration thereof are...
US-8,129,810 Continuous large area imaging and display arrays using readout arrays fabricated in silicon-on-glass substrates
A vertically-integrated image sensor is proposed with the performance characteristics of single crystal silicon but with the area coverage and cost of arrays...
US-8,129,809 Image sensor and manufacturing method thereof
Disclosed are an image sensor and a manufacturing method thereof. The image sensor includes a circuit layer on a first surface of a semiconductor substrate, a...
US-8,129,807 Electro-optical device and electronic apparatus
An electro-optical device includes a semiconductor layer including a channel region having a channel length along one of a first direction and a second...
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