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Patent # Description
US-8,129,303 Pathogen-resistant fabrics
A pathogen-resistant fabric comprising one or more photocatalysts capable of generating singlet oxygen from ambient air. The pathogen-resistant fabric may...
US-8,129,302 Blended hydrous kaolin clay product
The disclosed invention relates to a blended hydrous kaolin clay product comprising a platy coarse kaolin clay and a fine, hydrous kaolin clay. The blended...
US-8,129,301 Molding compound for producing a fireproof lining
Disclosed is a molding compound for producing a fireproof lining, especially for a combustion chamber of a stationary gas turbine. Said molding compound is...
US-8,129,300 Porous, fired ceramic foam
The invention relates to a porous, fired ceramic foam having a total porosity of between 50 and 92% and an intergranular porosity of at least 5%. In particular,...
US-8,129,299 Glass composition and process for producing glass composition
A glass composition which is reduced in the amount of residual bubbles and is produced using smaller amounts of an environmentally unfriendly component such as...
US-8,129,298 Nonwoven laminates and process for producing the same
A nonwoven fabric laminate possesses excellent elasticity, softness, water resistance, fuzz resistance and curl resistance, and has less stickiness. The...
US-8,129,297 Method and apparatus for heating nonwoven webs
A process for drying/heat-treating nonwoven webs in which the web is partially dried under tension in a first drying zone and further heat treated under low...
US-8,129,296 Velour fabric articles having improved dynamic insulation performance
A velour fabric article consists of a fabric body having a technical face formed by a filament stitch yarn and a technical back formed by a filament loop yarn....
US-8,129,295 Article of manufacture for warming the human body and extremities via graduated thermal insulation
An article of manufacture for warming human extremities via graduated thermal insulation with a blanket comprised of concentrations of and transitions to and...
US-8,129,294 Woven material comprising tape-like warp and weft, and an apparatus and method for weaving thereof
Novel woven materials, producible by a new weaving method, are described that comprise single or doubled warps and wefts in the form of tapes that are...
US-8,129,293 Impregnated flexible sheet material
A flexible sheet material useful as an energy absorbing material is impregnated with a dilatant silicone composition comprising the reaction product of a...
US-8,129,292 Integrated circuit arrangement with shockley diode or thyristor and method for production and use of a thyristor
An integrated circuit arrangement includes a Shockley diode or a thyristor. An inner region of the diode or of the thyristor is completely or partially shielded...
US-8,129,290 Method to increase tensile stress of silicon nitride films using a post PECVD deposition UV cure
High tensile stress in a deposited layer such as silicon nitride, may be achieved utilizing one or more techniques, employed alone or in combination. High...
US-8,129,289 Method to deposit conformal low temperature SiO2
Methods of controlling critical dimensions of reduced-sized features during semiconductor fabrication through pitch multiplication are disclosed. Pitch...
US-8,129,288 Combinatorial plasma enhanced deposition techniques
Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a...
US-8,129,287 Method for manufacturing semiconductor device and semiconductor device
A first oxide film and a second oxide film 16 are formed in a first region 13a and a second region 13b, respectively, on the surface of the semiconductor...
US-8,129,286 Reducing effective dielectric constant in semiconductor devices
Method of manufacturing a semiconductor device structure, including the steps of providing a structure having an insulator layer with at least one interconnect,...
US-8,129,285 Substrate processing system
A substrate processing method implemented in a substrate processing system that includes an etching apparatus that carries out plasma etching processing on a...
US-8,129,284 Heat treatment method and heat treatment apparatus for heating substrate by light irradiation
A semiconductor wafer in which a carbon thin film is formed on a surface of a silicon substrate implanted with impurities is irradiated with flash light emitted...
US-8,129,283 Plasma processing method and plasma processing apparatus
The invention provides a plasma processing apparatus and a dry etching method for etching a multilayered film structure having steps with high accuracy. The...
US-8,129,282 Plasma etching method and computer-readable storage medium
In a plasma etching method, a substrate, on which an oxide film as a target layer to be etched, a hard mask layer, and a patterned photoresist are sequentially...
US-8,129,281 Plasma based photoresist removal system for cleaning post ash residue
A method of cleaning a low dielectric constant film in a lithographic process includes providing a dielectric film having thereover a resist composition, the...
US-8,129,280 Substrate device having a tuned work function and methods of forming thereof
Substrate devices having tuned work functions and methods of forming thereof are provided. In some embodiments, forming devices on substrates may include...
US-8,129,279 Chemical mechanical polish process control for improvement in within-wafer thickness uniformity
A method of performing chemical mechanical polish (CMP) processes on a wafer includes providing the wafer; determining a thickness profile of a feature on a...
US-8,129,278 Chemical mechanical polishing process
A copper/barrier CMP process includes (a) providing a substrate having a bulk metal layer and a barrier layer; (b) polishing the substrate with a first hard...
US-8,129,277 Method of machining wafer
A method of machining a wafer in which, at the time of grinding the back-side surface of the wafer, only a back-side surface region corresponding to a device...
US-8,129,276 Void sealing in a dielectric material of a contact level of a semiconductor device comprising closely spaced...
In sophisticated semiconductor devices, a contact structure may be formed on the basis of a void positioned between closely spaced transistor elements wherein...
US-8,129,275 Process for manufacturing semiconductor integrated circuit device
In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a...
US-8,129,274 Method for making an aperture in a carrier and electrically connecting two opposite faces of the carrier
Disclosed is a method for making an aperture in a carrier and electrically connecting two opposite faces of the carrier. At first, a carrier is provided....
US-8,129,273 Semiconductor device and method for producing the same
In a semiconductor device which has through holes in an end face, in which a semiconductor element is fixedly mounted on a face of a substrate which has a...
US-8,129,272 Hidden plating traces
A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a...
US-8,129,271 Film forming method, film forming apparatus and storage medium
A film forming method is provided with a substrate placing step wherein a substrate is placed in a process chamber in an airtight status; a first film forming...
US-8,129,270 Method for depositing tungsten film having low resistivity, low roughness and high reflectivity
Top-down methods of increasing reflectivity of tungsten films to form films having high reflectivity, low resistivity and low roughness are provided. The...
US-8,129,269 Method of improving mechanical properties of semiconductor interconnects with nanoparticles
In a BEOL process, UV radiation is used in a curing process of ultra low-k (ULK) dielectrics. This radiation penetrates through the ULK material and reaches the...
US-8,129,268 Self-aligned lower bottom electrode
A method of fabricating a lower bottom electrode for a memory element and a semiconductor structure having the same includes forming a dielectric layer over a...
US-8,129,267 Alpha particle blocking wire structure and method fabricating same
An alpha particle blocking structure and method of making the structure. The structure includes: a semiconductor substrate; a set of interlevel dielectric...
US-8,129,266 Method of forming a shielded semiconductor device and structure therefor
In one embodiment, a semiconductor device is formed to include a plurality of conductor layers that interconnect electrical signals between semiconductor...
US-8,129,265 High performance system-on-chip discrete components using post passivation process
A system and method for forming post passivation discrete components, is described. High quality discrete components are formed on a layer of passivation, or on...
US-8,129,264 Method of fabricating a semiconductor device
A method of forming a dielectric layer having an air gap to isolate adjacent wirings or a gate stack of the semiconductor device is provided. A method of...
US-8,129,263 Wire bond interconnection and method of manufacture thereof
A method of manufacture of a semiconductor package includes: providing a substrate; mounting a semiconductor die on the substrate, the semiconductor die having...
US-8,129,262 Fabrication of field-effect transistor with vertical body-material dopant profile tailored to alleviate...
Fabrication of an insulated-gate field-effect transistor (110) entails separately introducing three body-material dopants, typically through an opening in a...
US-8,129,261 Conformal doping in P3I chamber
Methods for implanting ions into a substrate by a plasma immersion ion implanting process are provided. In one embodiment, a method for implanting ions into a...
US-8,129,260 Semiconductor substrates having low defects and methods of manufacturing the same
A semiconductor substrate includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is formed of II-VI-group...
US-8,129,259 Manufacturing method of preparing a substrate with forming and removing the check patterns in scribing regions...
A disclosed device includes a manufacturing method of semiconductor device including preparing a semiconductor substrate including semiconductor chip forming...
US-8,129,258 Method for dicing a semiconductor wafer, a chip diced from a semiconductor wafer, and an array of chips diced...
A method for dicing a semiconductor wafer, including: cutting a reference slot in a back main surface of the wafer; cutting a back slot in the back main...
US-8,129,257 Vertical outgassing channels
InP epitaxial material is directly bonded onto a Silicon-On-Insulator (SOI) wafer having Vertical Outgassing Channels (VOCs) between the bonding surface and the...
US-8,129,256 3D integrated circuit device fabrication with precisely controllable substrate removal
A method is provided for fabricating a 3D integrated circuit structure. According to the method, a first active circuitry layer wafer is provided. The first...
US-8,129,255 Firm, insulating and electrically conducting connection of processed semiconductor wafers
The invention relates to a process for and an arrangement of the connection of processed semiconductor wafers (1, 2) wherein, in addition to the firm...
US-8,129,254 Semiconductor device and manufacturing method thereof
A method of manufacturing a semiconductor device, includes forming an insulating film of a material having a low relative dielectric constant on a substrate,...
US-8,129,253 Providing current control over wafer borne semiconductor devices using trenches
Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1500) having a substrate (1520), at least one active layer (1565)...
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