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| Patent # | Description |
|---|---|
| US-8,138,051 |
Integrated circuit system with high voltage transistor and method of
manufacture thereof A method of manufacture of an integrated circuit system includes: providing a semiconductor substrate having an active region, implanted with impurities of a... |
| US-8,138,050 |
Transistor device comprising an asymmetric embedded semiconductor alloy Transistor characteristics may be adjusted on the basis of asymmetrically formed cavities in the drain and source areas so as to maintain a strain-inducing... |
| US-8,138,049 |
Fabrication of lateral double-diffused metal oxide semiconductor (LDMOS)
devices Methods of making, structures, devices, and/or applications for lateral double-diffused metal oxide semiconductor (LDMOS) transistors are disclosed. In one... |
| US-8,138,048 |
Semiconductor storage device It is intended to provide a semiconductor device having a reduced thickness of a silicon nitride film on an outer periphery of a gate electrode of an SGT. A... |
| US-8,138,047 |
Super junction semiconductor device In the specification and drawing a super junction semiconductor device is disclosed. The super junction semiconductor device comprises a P-type layer, a N.sup.+... |
| US-8,138,046 |
Process for fabricating a nanowire-based vertical transistor structure The invention relates to a process for fabricating a vertical transistor structure. On a substrate (10), is a first conductive layer (11), providing the source... |
| US-8,138,045 |
Method of forming sidewall spacers to reduce formation of recesses in the
substrate and increase dopant... A method of forming sidewall spacers for a gate in a semiconductor device includes depositing a gate oxide layer over a gate and source/drain regions, and using... |
| US-8,138,044 |
Method for manufacturing semiconductor flash memory and flash memory cell A semiconductor flash memory includes a tunnel oxide film formed over a semiconductor substrate, a first spacer composed of polysilicon formed over the... |
| US-8,138,043 |
Non-volatile semiconductor memory device and method of manufacturing the
same A method of manufacturing a non-volatile semiconductor memory device including previously forming a recess in a first peripheral region on a semiconductor... |
| US-8,138,042 |
Capacitor, method of increasing a capacitance area of same, and system
containing same A capacitor includes a substrate (110, 210), a first electrically insulating layer (120, 220) over the substrate, and a fin (130, 231) including a... |
| US-8,138,041 |
In-situ silicon cap for metal gate electrode Structure and method of improving the performance of metal gate devices by depositing an in-situ silicon (Si) cap are disclosed. A wafer including a substrate... |
| US-8,138,040 |
Method of manufacturing semiconductor device The invention provides a method of manufacturing a semiconductor device having a MOS transistor, a resistor element, etc on one semiconductor substrate, in... |
| US-8,138,039 |
Vertical wrap-around-gate field-effect-transistor for high density, low
voltage logic and memory array A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by... |
| US-8,138,038 |
Superior fill conditions in a replacement gate approach by performing a
polishing process based on a... In a replacement gate approach, a top area of a gate opening may receive a superior cross-sectional shape after the deposition of a work function adjusting... |
| US-8,138,037 |
Method and structure for gate height scaling with high-k/metal gate
technology A method and structure to scale metal gate height in high-k/metal gate transistors. A method includes forming a dummy gate and at least one polysilicon feature,... |
| US-8,138,036 |
Through silicon via and method of fabricating same A through silicon via structure and a method of fabricating the through silicon via. The method includes: (a) forming a trench in a silicon substrate, the... |
| US-8,138,035 |
Method for forming integrated circuits with aligned (100) NMOS and (110)
PMOS FinFET sidewall channels A method of forming an integrated circuit device that includes a plurality of multiple gate FinFETs (MuGFETs) is disclosed. Fins of different crystal... |
| US-8,138,034 |
Flexible electret transducer assembly, speaker, and method for fabricating
flexible electret transducer assembly A flexible electret transducer assembly including an electrical backplate and a membrane made of an electret material is disclosed. A plurality of spacers is... |
| US-8,138,033 |
Semiconductor component and method of manufacture A semiconductor component that includes a Schottky device, an edge termination structure, a non-Schottky semiconductor device, combinations thereof and a method... |
| US-8,138,032 |
Method for manufacturing thin film transistor having microcrystalline
semiconductor film A thin film transistor includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode; a semiconductor layer which... |
| US-8,138,031 |
Semiconductor device and method of manufacturing semiconductor device A method of manufacturing a semiconductor device includes forming a plurality of Fins including a semiconductor material on an insulation layer; forming gate... |
| US-8,138,030 |
Asymmetric finFET device with improved parasitic resistance and
capacitance A method for forming a fin field effect transistor (finFET) device includes, forming a fin structure in a substrate, forming a gate stack structure... |
| US-8,138,029 |
Structure and method having asymmetrical junction or reverse halo profile
for semiconductor on insulator (SOI)... A device and method is provided that in one embodiment provides a first semiconductor device including a first gate structure on a first channel region, in... |
| US-8,138,028 |
Method for manufacturing a phase change memory device with pillar bottom
electrode A method for manufacturing a mushroom-cell type phase change memory is based upon manufacturing a pillar of bottom electrode material upon a substrate including... |
| US-8,138,027 |
Optical semiconductor device having pre-molded leadframe with window and
method therefor A semiconductor device is made by providing a semiconductor die having an optically active area, providing a leadframe or pre-molded laminated substrate having... |
| US-8,138,026 |
Low cost lead-free preplated leadframe having improved adhesion and
solderability A leadframe with a structure made of a base metal (105), wherein the structure has a plurality of surfaces. On each of these surfaces are metal layers in a... |
| US-8,138,025 |
Microcap wafer bonding method and apparatus A method of fabricating an apparatus including a sealed cavity and an apparatus embodying the method are disclosed. To fabricate the apparatus, a device chip... |
| US-8,138,024 |
Package system for shielding semiconductor dies from electromagnetic
interference A method of manufacturing a package system includes: providing a semiconductor die with a contact pad and a ground pad, mounting the semiconductor die on a... |
| US-8,138,023 |
Method for forming laminated structure and method for manufacturing
semiconductor device using the method thereof A method for manufacturing a semiconductor device includes the steps of (a) preparing a wafer including a first circuit formation region and a first surrounding... |
| US-8,138,022 |
Method of manufacturing semiconductor device A first conductive member made of metal is provided over a first wiring substrate, which is a mounting substrate in the lower tier, a through hole is provided... |
| US-8,138,021 |
Apparatus for packaging semiconductor devices, packaged semiconductor
components, methods of manufacturing... Packaged semiconductor components, apparatus for packaging semiconductor devices, methods of packaging semiconductor devices, and methods of manufacturing... |
| US-8,138,020 |
Wafer level integrated interconnect decal and manufacturing method thereof A wafer level integrated interconnect decal manufacturing method and wafer level integrated interconnect decal arrangement. In accordance with the technology... |
| US-8,138,019 |
Integrated (multilayer) circuits and process of producing the same A process of forming a semiconductor integrated circuit that includes the steps of: forming at least a first element having a first pattern of conductive... |
| US-8,138,018 |
Manufacturing method of semiconductor device having underfill resin formed
without void between semiconductor... A manufacturing method of a semiconductor device includes a film state underfill resin adhering step wherein film state underfill resin in a semi-cured state is... |
| US-8,138,017 |
Integrated circuit package system with through semiconductor vias and
method of manufacture thereof A method of manufacture of an integrated circuit package system includes: providing a package substrate; mounting a first integrated circuit die, having through... |
| US-8,138,016 |
Large area integration of quartz resonators with electronics Methods for integrating quartz-based resonators with electronics on a large area wafer through direct pick-and-place and flip-chip bonding or wafer-to-wafer... |
| US-8,138,015 |
Interconnection in multi-chip with interposers and bridges A structure formation method. The method may include: attaching a substrate, a first interposer, a second interposer, and a first bridge together such that the... |
| US-8,138,014 |
Method of forming thin profile WLCSP with vertical interconnect over
package footprint A semiconductor wafer has a plurality of first semiconductor die. A second semiconductor die is mounted to the first semiconductor die. The active surface of... |
| US-8,138,013 |
Method and apparatus for forming a photodiode A method for forming a photodiode is provided. The method comprises: providing a region of semiconductor material having a first surface and a second surface;... |
| US-8,138,012 |
Production of an improved color filter on a microelectronic imaging device
comprising a cavity A microelectronic device includes a color filter equipped with a plurality of filtering elements, including several filtering elements. The device includes at... |
| US-8,138,011 |
Radiation-detecting device and method of manufacturing same A method of manufacturing a radiation-detecting device including spaced first columnar scintillators, second columnar scintillators which are located between... |
| US-8,138,010 |
Method for fabricating high density pillar structures by double patterning
using positive photoresist A method of making a semiconductor device includes forming a first photoresist layer over an underlying layer, patterning the first photoresist layer into a... |
| US-8,138,009 |
Method of fabricating thin film solar cell and apparatus for fabricating
thin film solar cell Disclosed is a method of fabricating a thin film solar cell including introducing a reaction solution into a reaction chamber, fixing a supporter onto a loader,... |
| US-8,138,008 |
Forming an oxide MEMS beam Solutions for forming a semiconductor including an oxide MEMS beam are disclosed. In one embodiment, a method of forming a beam within a sealed cavity includes:... |
| US-8,138,007 |
MEMS device with stress isolation and method of fabrication A MEMS device (20) with stress isolation includes elements (28, 30, 32) formed in a first structural layer (24) and elements (68, 70) formed in a second... |
| US-8,138,006 |
Method for producing a micromechanical component having a trench structure
for backside contact A method for manufacturing a micromechanical component is proposed. In this context, at least one trench structure having a depth less than the substrate... |
| US-8,138,005 |
Method for fabricating novel high-performance field-effect transistor
biosensor based on conductive polymer... Disclosed is a method for fabricating a high-performance field-effect transistor biosensor for diagnosing cancers using micro conductive polymer nanomaterials... |
| US-8,138,004 |
Photoelectric conversion device, manufacturing method thereof and
semiconductor device A manufacturing method of a photoelectric conversion device includes the following steps: forming a first electrode over a substrate; and, over the first... |
| US-8,138,003 |
Method of manufacturing nitride semiconductor substrates having a base
substrate with parallel trenches The present invention relates to a nitride semiconductor substrate such as gallium nitride substrate and a method for manufacturing the same. The present... |
| US-8,138,002 |
Semiconductor light-emitting element, fabrication method thereof, convex
part formed on backing, and convex... A convex part formation method of forming a convex part in parallel with a <110> direction of a backing on the backing having a {100} face as the top... |
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