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Patent # Description
US-8,144,563 Information recording medium, reproducing device and reproducing method
An information recording medium according to the present invention includes at least three information recording layers. If the readout power of a laser beam in...
US-8,144,562 Optical disc apparatus, method of controlling the same, and information storage medium
An optical disc apparatus includes an optical pickup for outputting an output signal according to reflected light from an optical disc medium and a comparison...
US-8,144,561 Multilayer optical recording medium
A multilayer recording medium has a three-layered structure for an increased capacity, including an L.sub.0 layer, an L.sub.1 layer, and an L.sub.2 layer in...
US-8,144,560 Method for preventing interchange of optical information carriers
The invention relates to a method for preventing interchange of a first optical information carrier (1) with a second optical information carrier in an optical...
US-8,144,559 Multiple pulse recording method with 3-valued power levels
Pulses modulated between the erase power and the bottom power are used instead of cooling pulses for an optical disk medium that needs a write strategy with...
US-8,144,558 Hidden patterns on a data storage medium
Apparatus and method for providing hidden data to a data storage medium. The hidden data are written by selectively adjusting at least one access parameter of...
US-8,144,557 Optical information recording/reproducing apparatus and disk distinction method
An optical information recording/reproducing apparatus includes an optical source unit that emits an optical beam toward an optical information recording medium...
US-8,144,556 Optical disc recording apparatus and method, and computer program
An information recording apparatus (1) is provided with: a recording device (102) for recording information onto an information recording medium (100) by...
US-8,144,555 System and method for embedding optical drive compatibility information in optical media
Compatibility information embedded in an optical medium modifies actions allowed by predetermined non-compatible optical disc drives on the optical medium, such...
US-8,144,554 Method of and apparatus for recording data on write-once disc, method of and apparatus for reproducing data...
A method and apparatus recording and/or reproducing data on/from a write-once disc, and a write-once disc therefor, the write-once disc having at least one...
US-8,144,553 Disk drive
A disk drive for driving a disk is disclosed, which includes: a driving unit configured to provide a driving force onto the disk, a main circuit pattern...
US-8,144,552 TE signal polarity determining system and related method thereof
A tracking error (TE) signal polarity determining method, comprising: (a) obtaining a wobble related signal and a TE signal from an optical pick-up unit...
US-8,144,551 Reproducing control device having resuming function
A battery charger includes: a resume information table for storing resume information about contents to be started to be reproduced with a portable player being...
US-8,144,550 Drive apparatus for performing a sequential recording and reproduction on a write-once recording medium, and...
The drive apparatus of the present invention includes a recording/reproduction section and a drive control section. The drive control section determines a...
US-8,144,549 Head stack assembly and information recording apparatus
An information recording apparatus includes a medium for recording information; a head slider including a device for writing the information onto the medium and...
US-8,144,548 Electronic device, time correction method and time correction program thereof
An electronic device corrects its device side time with a time correction information supplied from outside the device. The electronic device includes a...
US-8,144,547 Wearable electronic device with multiple display functionality
A wearable electronic device for conveying information in an analog manner at least in part by the use of at least one display hand positioned on the dial side...
US-8,144,546 Method and apparatus for detection and classification of a swimming object
A method and apparatus for detecting and classifying submerged swimming object from a passive signal generated by, and an active signal reflected from the...
US-8,144,545 Acoustic navigation device and method of detecting movement of a navigation device
A navigation device for navigating a user interface of a processor-controlled device includes an acoustic transmitter adapted to transmit an acoustic signal, an...
US-8,144,544 Method of processing echo profile, and pulse-echo system for use with the method
An echo profile in a pulse-echo ranging system is processed by determining the relative slope at points on the profile, determining the relative area of each...
US-8,144,543 Seismic data processing method for RMO picking
The invention relates to a method of processing seismic data, the said seismic data comprising a gather of seismic traces organized according to one or several...
US-8,144,542 Semiconductor memory apparatus and method for operating the same
A semiconductor memory apparatus includes a clock input unit configured to receive a system clock and a data clock, a data clock phase regulation unit...
US-8,144,541 Method and apparatus for adjusting and obtaining a reference voltage
A method for adjusting a reference voltage is provided, including: decoding a default code configured in a reference voltage register in a chip to obtain an...
US-8,144,540 Two-port 8T SRAM design
An integrated circuit includes a two-port static random access memory (SRAM) cell, which includes a first half write-port, a second half write-port, and a...
US-8,144,539 Semiconductor memory device for self refresh and memory system having the same
A semiconductor memory device includes a memory core unit including a memory cell array including a plurality of memory cells and a sense amplifier to sense and...
US-8,144,538 Semiconductor device
A semiconductor device to improve layout uniformity may include an active region formed in a substrate, a dummy active region formed in the substrate and...
US-8,144,537 Balanced sense amplifier for single ended bitline memory architecture
A balanced differential amplifier sense amplifier senses the voltage level in a selected single bit line memory cell. The output of the selected single bit-line...
US-8,144,536 Semiconductor memory and system
A word driver supplies a high level voltage to a word line when a memory cell is accessed and supplies low level voltage which is a negative voltage to the word...
US-8,144,535 Test circuit for measuring resistance distribution of memory cells and semiconductor system including the same
The test circuit for measuring a resistance distribution of memory cells includes a sensing circuit and a digital value generation circuit. The sensing circuit...
US-8,144,534 Methods and memory devices for repairing memory cells
Methods and memory devices for repairing memory cells are discloses, such as a memory device that includes a main array having a plurality of sections of memory...
US-8,144,533 Compensatory memory system
A compensatory memory system is described. This memory system substantially improves performance by adapting an associated delay in a way that optimizes circuit...
US-8,144,532 Semiconductor memory device and method of controlling same
A memory cell is provided at an intersection of a word line and a bit line. A sense amplifier circuit senses and amplifies a signal on the bit line. Replica...
US-8,144,531 Latency control circuit, semiconductor memory device including the same, and method for controlling latency
A latency control circuit includes a path calculator configured to calculate a delay value of a path that an input signal is to go through inside a chip and...
US-8,144,530 Semiconductor memory device and method for generating output enable signal
A semiconductor memory device is able to generate an output enable signal in response to a read command and CAS latency information. The semiconductor memory...
US-8,144,529 System and method for delay locked loop relock mode
Embodiments of the present invention describe a memory device comprising a delay line and a feedback circuit coupled to the delay line. The feedback circuit has...
US-8,144,528 Memory with data control
In an embodiment, a memory device comprises memory, a first data link, a first input, a second input, a second data link, a first output and a second output....
US-8,144,527 Semiconductor memory device
A semiconductor memory device includes: a data multiplexing unit configured to output one of a data training pattern and data transferred through a first global...
US-8,144,526 Method to improve the write speed for memory products
A method and circuit are given, to realize a Bit-Line Sense Amplifier with Data-Line Bit Switch (BS) pass transistors for Random Access Memory (RAM) products as...
US-8,144,525 Memory cell sensing using negative voltage
Embodiments of the present disclosure provide methods, devices, modules, and systems for memory cell sensing using negative voltage. One method includes...
US-8,144,524 Semiconductor device and semiconductor package including the same
To include a plurality of pad groups each including a first data I/O pad, a first power supply pad, a second data I/O pad, and a second power supply pad...
US-8,144,523 Semiconductor storage device
A semiconductor storage device in accordance with an exemplary aspect of the present invention includes a plurality of memory cells arranged in a matrix...
US-8,144,522 Erasing flash memory using adaptive drain and/or gate bias
A hot hole erase operation as described herein can be utilized for a flash memory device having an array of memory cells. The erase operation employs an...
US-8,144,521 Method of operating nonvolatile memory device
A method of operating a nonvolatile memory device comprising cell strings each comprising memory cells coupled in series between a drain select transistor and a...
US-8,144,520 Non-volatile memory device and method of reading data in a non-volatile memory device
A non-volatile memory device includes a row decoder and a memory cell array. The row decoder generates a read voltage, and first, second and third drive...
US-8,144,519 Programming a flash memory device
An initial verify read operation is performed after each programming pulse. The verify voltage starts at an initial verify voltage for the first word line and...
US-8,144,518 Semiconductor device
The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and...
US-8,144,517 Multilayered nonvolatile memory with adaptive control
A method and device for adaptive control of multilayered nonvolatile semiconductor memory are provided, the device including memory cells organized into groups...
US-8,144,516 Dynamic pass voltage for sense operation in a memory device
Methods for sensing and memory devices are disclosed. One such method for sensing uses a dynamic pass voltage on at least one adjacent memory cell that is...
US-8,144,515 Interleaved flash storage system and method
A flash storage system accesses data interleaved among flash storage devices. The flash storage system receives a data block including data portions, stores the...
US-8,144,514 One-transistor floating-body DRAM cell device with non-volatile function
The 1T floating-body DRAM cell device includes a floating body for storing information of the DRAM cell device, a source and a drain formed on respective sides...
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