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| Patent # | Description |
|---|---|
| US-8,145,968 |
Method of determining binary signal of memory cell and apparatus thereof A method and apparatus to determine a binary signal of a memory cell capable of decreasing an error rate of binary signal determination that occur due to... |
| US-8,145,967 |
System and method for verifying the receive path of an input/output
component A system and method for verifying the receive path of an input/output device such as a network interface circuit. The device's operation with various different... |
| US-8,145,966 |
Remote testing system and method A method and system of supporting and testing equipment distant from the support system are provided. The method includes the steps of forming a communications... |
| US-8,145,965 |
Test apparatus for testing a device under test and device for receiving a
signal A test apparatus for testing a device under test includes a capture memory that stores thereon an output pattern received from the device under test, a header... |
| US-8,145,964 |
Scan test circuit and scan test control method A circuit includes a control flip-flop inputting a scan control signal and a scan path chain formed of scan storage elements serially connected. The scan path... |
| US-8,145,963 |
Semiconductor integrated circuit device and delay fault testing method
thereof A semiconductor integrated circuit device includes a first clock domain having a plurality of first flip-flops which is configured to operate with a high-speed... |
| US-8,145,962 |
TAP interface select circuit with TMS/RCK or RCK lead This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial... |
| US-8,145,961 |
Fast ECC memory testing by software including ECC check byte The present invention relates to the architecture and operation of computer hardware memory logic, and in particular to a method and respective system for... |
| US-8,145,960 |
Storage of data in data stores having some faulty storage locations Data storage control circuitry for controlling storage and retrieval of data in a data store in which data is stored in data blocks. A group data store stores... |
| US-8,145,959 |
Systems and methods for measuring soft errors and soft error rates in an
application specific integrated circuit A test system includes a computer and an interface device for accessing a scan chain on an application specific integrated circuit (ASIC) under test. The... |
| US-8,145,958 |
Integrated circuit and method for testing memory on the integrated circuit An integrated circuit and method for testing memory on the integrated circuit are provided. The integrated circuit has processing logic for performing data... |
| US-8,145,957 |
Using fractional sectors for mapping defects in disk drives Herein described is at least a method and system for processing a read or write operation when one or more defects are mapped using one or more fractional... |
| US-8,145,956 |
Information processing apparatus, failure processing method, and recording
medium in which failure processing... An information processing apparatus includes partitioning mode information retaining section, hardware resource management information retaining section,... |
| US-8,145,955 |
Monitoring apparatus, information processing system, monitoring method and
computer readable medium A monitoring apparatus includes: a reception section that receives information including first use mode information from an first information processing... |
| US-8,145,954 |
System and method for generating a chronic circuit report for use in
proactive maintenance of a communication... A method for generating a chronic circuit report for use in maintaining a communication network is provided. The method comprises the steps of searching a... |
| US-8,145,953 |
Programmable unit A program-controlled unit including a monitoring device, which compares a value, depending on the flow of the program executed by the program-controlled unit,... |
| US-8,145,952 |
Storage system and a control method for a storage system A storage system includes a storage device for storing data, a pair of adapters connected with the storage device, each of the adapters transmitting and... |
| US-8,145,951 |
Control device A control device includes: memory diagnosis means for setting a power-on status when an electric power is turned on and diagnosing an ECC memory; restarting... |
| US-8,145,950 |
Execution of a plugin according to plugin stability level Executing a plugin includes obtaining a stability level of the plugin to be executed, determining a plugin execution mode based at least in part on the... |
| US-8,145,949 |
Automated regression failure management system In a first embodiment of the present invention, a method for performing regression testing on a simulated hardware is provided, the method comprising: scanning... |
| US-8,145,948 |
Governance in work flow software The disclosure presents categorization of users into groups comprising expert users and novice users. A system and method analyzes the users' inputted data in... |
| US-8,145,947 |
User customizable CVFS namespace An apparatus and method are described for defining, maintaining and displaying a checkpoint result set to facilitate identification of desirable checkpoints... |
| US-8,145,946 |
Task execution apparatus, task execution method, and storage medium A task execution apparatus includes an execution unit configured to execute a task on a plurality of devices, an acquisition unit configured to acquire a cause... |
| US-8,145,945 |
Packet mirroring between primary and secondary virtualized software images
for improved system failover performance Packet loss at a standby server during failover results when the primary fails. There is currently always some amount of packet traffic that is inbound to the... |
| US-8,145,944 |
Business process error handling through process instance backup and
recovery According to one embodiment of the present invention, a method for business process error handling through process instance backup and recovery includes the... |
| US-8,145,943 |
State variable-based detection and correction of errors Embodiments provide methods and apparatuses for detecting errors in a computation using state variables. In various embodiments, corrections of the errors... |
| US-8,145,942 |
Methods and systems for troubleshooting remote systems through recreation
of remote system scenarios According to one embodiment, a debugging tool includes a processor and logic, that when executed by the processor, causes the processor to: receive a Volume... |
| US-8,145,941 |
Detection and correction of block-level data corruption in fault-tolerant
data-storage systems Various embodiments of the present invention provide fault-tolerant, redundancy-based data-storage systems that rely on disk-controller-implemented error... |
| US-8,145,940 |
Method and system for updating a software image A method and system for updating or recovering a computer device's software image using a single portable operating system image stored on a bootable, secure... |
| US-8,145,939 |
Detection and reduction of excessive SNMP traffic Various embodiments herein include at least one of systems, methods, and software to detect and reduce messages from network entity management clients that are... |
| US-8,145,938 |
Fencing management in clusters Apparatus, systems, and methods may operate to detect a failure in a failed one of a plurality of nodes included in a cluster, and to fence a portion of the... |
| US-8,145,937 |
System and method for communication error processing in outside channel
combination environment Provided are a system and method for processing communication errors in an outside channel combination environment. The system includes: first and second... |
| US-8,145,936 |
Automated computing appliance disaster recovery A system and method for automatic disaster recovery of a computing appliance including reconstruction of its previous operational state. A configuration bundle... |
| US-8,145,935 |
Clock signal generator for generating stable clock signal, semiconductor
memory device including the same, and... A clock signal generator can include a clock signal generation unit that is configured to generate a clock signal. A clock signal control unit is configured to... |
| US-8,145,934 |
Soft start sequencer for starting multiple voltage regulators A soft start sequencer is disclosed for starting a plurality of voltage regulators, the soft start sequencer comprising a first clock for clocking a plurality... |
| US-8,145,933 |
Power control circuit A power control circuit includes an input/output controller hub (ICH), and first to third metal-oxide-semiconductor field effect transistors (MOSFETs). A drain... |
| US-8,145,932 |
Systems, methods and media for reducing power consumption in multiple
controller information handling systems An information handling system (IHS) provides a method for conserving power. The method includes monitoring at least one performance characteristic of the IHS... |
| US-8,145,931 |
Imaging device with adaptive power saving behavior and method for use
thereon An imaging device with an adaptive power saving behavior conserves power by establishing reduced power mode entry and/or exit timeout values based on device... |
| US-8,145,930 |
Storage system and management information acquisition method for power
saving The object of the invention is to control the power consumption in a storage subsystem. In a storage system, when a monitor in a host computer acquires... |
| US-8,145,929 |
Stochastic management of power consumption by computer systems Embodiments of the present disclosure describe methods, computer-readable media and system configurations for stochastic power management of one or more... |
| US-8,145,928 |
Methods and systems for power management in a data processing system Methods and systems for managing power consumption in data processing systems are described. In one embodiment, a data processing system includes a general... |
| US-8,145,927 |
Operation management method of information processing system In a computer room including information processing devices and air conditioners, power saving of the computer room by means of optimization of workload... |
| US-8,145,926 |
Fan speed control of silicon based devices in low power mode to reduce
platform power In general, in one aspect, the disclosure describes running a cooling fan within a computer at low speed while the computer is in low temperature operations... |
| US-8,145,925 |
Non-volatile semiconductor memory device with power saving feature A non-volatile semiconductor memory device, which comprises (i) an interface having an input for receiving an input clock and a set of data lines for receiving... |
| US-8,145,924 |
Storage apparatus and start-up control method for the same At the time of initial start-up, two or more storage units are started as a start-up control unit so that the total power consumption will not exceed specified... |
| US-8,145,923 |
Circuit for and method of minimizing power consumption in an integrated
circuit device A method of minimizing power consumption in an integrated device is disclosed. The method comprises providing a plurality of circuit blocks having circuits for... |
| US-8,145,922 |
System and method for controlling power delivered to a powered device
based on cable characteristics A system and method for discovering a cable type and resistance for Power over Ethernet (PoE) applications. Cabling power loss in PoE applications is related to... |
| US-8,145,921 |
Multi-regulator power supply chip with common control bus A system and method for implementing a common control bus in a multi-regulator power supply integrated circuit. The integrated circuit may, for example,... |
| US-8,145,920 |
Techniques for collaborative power management for heterogeneous networks Techniques for collaborative power management for heterogeneous networks are described. An apparatus may include a first node having a managed power system and... |
| US-8,145,919 |
Power supply apparatus and method using same A power supply module removably disposed within an automated data storage and retrieval system. An automated data storage and retrieval system which includes... |
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