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Patent # Description
US-8,143,708 Semiconductor device and method for manufacturing the same
An object is to provide a thin and small semiconductor device that has high reliability and high resistance to external stress and electrostatic discharge....
US-8,143,707 Semiconductor device
A semiconductor device includes a circuit base including an inner lead portion and an outer lead portion. The inner lead portion has a plurality of inner leads....
US-8,143,706 Method of forming a component having dielectric sub-layers
Embodiments of methods, apparatuses, devices, and/or systems for forming a component having dielectric sub-layers are described.
US-8,143,705 Tamper-resistant semiconductor device and methods of manufacturing thereof
The invention relates to a tamper-resistant semiconductor device comprising a substrate (5) comprising an electronic circuit arranged on a first side thereof....
US-8,143,704 Electronic assemblies including mechanically secured protruding bonding conductor joints
An electronic assembly includes an IC die including a semiconductor top surface having active circuitry thereon and a bottom surface, and at least one...
US-8,143,703 Methods and devices for forming nanostructure monolayers and devices including such monolayers
Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association...
US-8,143,702 Group III-V nitride based semiconductor substrate and method of making same
A group III-V nitride-based semiconductor substrate includes a group III-V nitride-based semiconductor crystal. A surface area of the substrate is greater than...
US-8,143,701 Method of forming a high capacitance diode and structure therefor
In one embodiment, high doped semiconductor channels are formed in a semiconductor region of an opposite conductivity type to increase the capacitance of the...
US-8,143,700 Electrostatic discharge protection circuit
The present invention provides an electrostatic discharge (ESD) protection circuit with a silicon controlled rectifier (SCR) having a plurality of SCR fingers...
US-8,143,699 Dual-dielectric MIM capacitors for system-on-chip applications
An integrated circuit structure includes a chip having a first region and a second region. A first metal-insulator-metal (MIM) capacitor is formed in the first...
US-8,143,698 Semiconductor device
A problem of an increased manufacturing cost is caused in conventional semiconductor devices. A semiconductor device 1 includes: a lower electrode 102 provided...
US-8,143,697 Method, apparatus, and system for low temperature deposition and irradiation annealing of thin film capacitor
Some embodiments of the invention include thin film capacitors formed in a package substrate of an integrated circuit package. At least one of the thin film...
US-8,143,696 Integrated circuit inductors with reduced magnetic coupling
An IC inductor structure is provided which includes a first inductor element formed on a semiconductor substrate and at least a second inductor element formed...
US-8,143,695 Contact fuse one time programmable memory
A fuse structure for a semiconductor integrated circuit (IC) can include a first node comprising a region of a metal layer of an IC manufacturing process and a...
US-8,143,694 Fuse device
Implementations are presented herein that relate to a fuse device, an integrated circuit including a fuse device, a method of implementing a fuse device and a...
US-8,143,693 Semiconductor device including redistribution line structure and method of fabricating the same
The invention provides a semiconductor device. The semiconductor device includes a semiconductor chip having an active surface on which pads are disposed, a...
US-8,143,692 Capacitance trimming circuit of semiconductor device having vertically stacked capacitor layers and operation...
A capacitance trimming circuit of a semiconductor device may include a plurality of capacitor layers and/or a plurality of fuses. The plurality of capacitor...
US-8,143,691 Semiconductor device and method for making the same
To provide a semiconductor device and a method of making the same, the device being capable of preventing decrease in the withstanding voltage along the...
US-8,143,690 Semiconductor device having electrostatic discharge protection circuit and method of manufacturing the same
Semiconductor device having an on-chip type electrostatic discharge (ESD) protection circuit and a method of manufacturing the same are provided. The on-chip...
US-8,143,689 Sensor device
A sensor device for sensing air flow speed at the exterior of an aircraft, comprising a substrate having an upper side on which is mounted a diaphragm over an...
US-8,143,688 Highly-depleted laser doped semiconductor volume
A device with increased photo-sensitivity using laser treated semiconductor as detection material is disclosed. In some embodiments, the laser treated...
US-8,143,687 Multi-band, reduced-volume radiation detectors and methods of formation
A broadband radiation detector includes a first layer having a first type of electrical conductivity type. A second layer has a second type of electrical...
US-8,143,686 Laser-induced structuring of substrate surfaces
In one aspect, the present invention provides a method of processing a substrate, e.g., a semiconductor substrate, by irradiating a surface of the substrate (or...
US-8,143,685 Image sensor having nanodot
An image sensor includes a plurality of pixels disposed in an array, each pixel comprising a first region and a second region, the first region and the second...
US-8,143,684 Magnetoresistive element
A magnetoresistive element includes a first magnetic layer which includes a first surface and a second surface and has a first standard electrode potential, a...
US-8,143,683 In-situ formed capping layer in MTJ devices
A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a...
US-8,143,682 Methods and systems for implementing logic gates with spintronic devices located at nanowire crossbar junctions...
Various method and system embodiments of the present invention are directed to implementing serial logic gates using nanowire-crossbar arrays with spintronic...
US-8,143,681 Saw devices, processes for making them, and methods of use
The design, fabrication, post-processing and characterization of a novel SAW (Surface Acoustic Wave) based bio/chemical sensor in CMOS technology is introduced....
US-8,143,680 Gated diode with non-planar source region
A gated-diode semiconductor device or similar component and a method of fabricating the device. The device features a gate structure disposed on a substrate...
US-8,143,679 Termination structure for power devices
A semiconductor power device includes an active region configured to conduct current when the semiconductor device is biased in a conducting state, and a...
US-8,143,678 Thin film transistors having multi-layer channel
A transistor may include: a gate insulting layer; a gate electrode formed on the gate insulating layer; a channel layer formed on the gate insulating layer; and...
US-8,143,677 Transistor, a transistor arrangement and method thereof
A transistor, transistor arrangement and method thereof are provided. The example method may include determining whether a gate width of the transistor has been...
US-8,143,676 Semiconductor device having a high-dielectric-constant gate insulating film
A semiconductor device includes a substrate having first and second regions on a surface thereof, a first conductivity type first MISFET formed in the first...
US-8,143,675 Semiconductor device and method of manufacturing semiconductor device
The semiconductor device includes an n-channel transistor including n-type source/drain regions and a first gate electrode, a first sidewall insulating film...
US-8,143,674 Semiconductor devices having resistors
A semiconductor device having a resistor and a method of fabricating the same are provided. The semiconductor device includes a semiconductor substrate having a...
US-8,143,673 Circuit with electrostatic discharge protection
A circuit with electrostatic discharge protection is described. The circuit includes an output driver transistor with an extended drain contact region. The...
US-8,143,672 Semiconductor device including a metal layer having a first pattern and a second pattern which together form a...
A semiconductor device includes a diode region having a plurality of protection diodes and a pad region overlapped with an upper part of the diode region. The...
US-8,143,671 Lateral trench FETs (field effect transistors)
A semiconductor structure and associated method of formation. The semiconductor structure includes a semiconductor substrate, a first doped transistor region of...
US-8,143,670 Self aligned field effect transistor structure
Provided is a self aligned filed effect transistor structure. The self aligned field effect transistor structure includes: an active region on a substrate; a...
US-8,143,668 SiGe MOSFET semiconductor device with sloped source/drain regions
Performance of a semiconductor device having a MIS transistor is improved. A semiconductor device includes: a pair of source/drain regions each formed by...
US-8,143,667 Semiconductor device having non-volatile memory and method of fabricating the same
A memory cell of a non-volatile memory device, comprises: a select transistor gate of a select transistor on a substrate, the select transistor gate comprising:...
US-8,143,666 Semiconductor device with amorphous silicon monos memory cell structure and method for manufacturing thereof
A semiconductor device with an amorphous silicon (a-Si) metal-oxide-nitride-oxide-semiconductor (MONOS) memory cell structure. The device includes a substrate,...
US-8,143,665 Memory array and method for manufacturing and operating the same
The invention provides a memory array. The memory array comprises a substrate, a plurality of word lines, a charge trapping structure, a plurality of trench...
US-8,143,664 Semiconductor device having lower leakage current between semiconductor substrate and bit lines
A semiconductor device includes a bit line that is provided in a semiconductor substrate, a silicide layer that has side faces and a bottom face surrounded by...
US-8,143,663 Non-volatile memory device having selection gates formed on the sidewalls of dielectric layers
A non-volatile memory device having a split gate type cell structure, a method for fabricating the same, and a method for fabricating a semiconductor device by...
US-8,143,662 Semiconductor device
A semiconductor device comprising a first insulating film provided on a semiconductor substrate in a cell transistor region, a first conductive film provided on...
US-8,143,661 Memory cell system with charge trap
A memory cell system is provided including a first insulator layer over a semiconductor substrate, a charge trap layer over the first insulator layer, and slot...
US-8,143,660 Method for manufacturing oxide film having high dielectric constant, capacitor having dielectric film formed...
Provided are a method for manufacturing a high k-dielectric oxide film, a capacitor having a dielectric film formed using the method, and a method for...
US-8,143,659 Vertical trench capacitor, chip comprising the capacitor, and method for producing the capacitor
A capacitor is described which includes a substrate with a doped area of the substrate forming a first electrode of the capacitor. A plurality of trenches is...
US-8,143,658 Charge storage nanostructure
The present invention relates to a nanostructured device for charge storage. In particular the invention relates to a charge storage device that can be used for...
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