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III-Nitride device with solderable front metal
Some exemplary embodiments of a III-nitride power device including a HEMT with multiple interconnect metal layers and a solderable front metal structure using...
Integrated power device with III-nitride half bridges
A semiconductor device that includes a plurality of isolated half-bridges formed in a common semiconductor die.
Compound semiconductor device and manufacturing method of the same
An electrode (109) insulated from a compound semiconductor layer (102) and being in contact with an electrode (101) and a compound semiconductor layer (103) is...
A semiconductor device in which an element region including at least an IGBT region is formed on a semiconductor substrate is presented. The IGBT region...
Bipolar junction transistors and methods of fabrication
A structure, including a bipolar junction transistor and method of fabrication thereof, is provided herein. The bipolar junction transistor includes: a...
Bipolar transistor with extrinsic base region and methods of fabrication
The present disclosure relates to integrated circuit (IC) structures and methods of forming the same. An IC structure according to the present disclosure can...
Bipolar transistor structure and a method of manufacturing a bipolar
According to various embodiments, a bipolar transistor structure may include: a substrate; a collector region in the substrate; a base region disposed over the...
Graphene device including separated junction contacts and method of
manufacturing the same
A graphene device including separated junction contacts and a method of manufacturing the same are disclosed. The graphene device is a field effect transistor...
FinFET with a silicon germanium alloy channel and method of fabrication
A gate cavity is formed exposing a portion of a silicon fin by removing a sacrificial gate structure that straddles the silicon fin. An epitaxial silicon...
Processing of integrated circuit for metal gate replacement
Embodiments of the present disclosure provide a method of processing an integrated circuit (IC) structure for metal gate replacement, the method comprising:...
Manufacturing method of non-planar FET
The present invention provides a non-planar FET which includes a substrate, a fin structure, a sub spacer, a gate, a dielectric layer and a source/drain region....
finFET with dielectric isolation after gate module for improved source and
drain region epitaxial growth
A method forming a semiconductor device that in one embodiment includes forming a gate structure on a channel region of fin structures, and forming a flowable...
Multi-fin device and method of making same
A multiple-fin device includes a substrate and a plurality of fins formed on the substrate. Source and drain regions are formed in the respective fins. A...
Manufacture of a variation resistant metal-oxide-semiconductor field
effect transistor (MOSFET)
Variation resistant metal-oxide-semiconductor field effect transistors (MOSFETs) are manufactured using a high-K, metal-gate `channel-last` process. A cavity is...
Semiconductor devices and methods for manufacturing the same
Semiconductor devices and methods for manufacturing the same are disclosed. In one embodiment, the method comprises: forming a first shielding layer on a...
FinFET with epitaxial source and drain regions and dielectric isolated
A semiconductor device is provided that includes a pedestal of an insulating material present over at least one layer of a semiconductor material, and at least...
Semiconductor structure and fabrication method thereof
A semiconductor structure includes a gate structure disposed on a substrate and having an outer spacer, a recess disposed in the substrate and adjacent to the...
Partially-blocked well implant to improve diode ideality with SiGe anode
A method of manufacturing a semiconductor device is disclosed. A p-type substrate is doped to form an N-well in a selected portion of a p-type substrate...
Semiconductor device and method for manufacturing the same
A semiconductor device and a method for manufacturing the same. The method includes steps hereinafter. A substrate is provided with a first dielectric layer...
Semiconductor device and manufacturing method thereof
The semiconductor device includes a gate electrode, a first interlayer dielectric, a first mask layer, a second mask layer and a second interlayer dielectric....
Stripe structures and fabrication method thereof
A method is provided for fabricating stripe structures. The method includes providing a substrate; and forming a to-be-etched layer on the substrate. The method...
Contact etch stop layers of a field effect transistor
The disclosure relates to a field effect transistor. An exemplary structure for a field effect transistor comprises a substrate; a source region and a drain...
Double gate type thin film transistor and organic light emitting diode
display including the same
A double gate type thin film transistor includes a first electrode on a substrate; a gate insulating layer on the first gate electrode; a semiconductor layer on...
Field-effect transistor and fabricating method thereof
A method for fabricating a field-effect transistor is provided. The method includes: forming a gate dielectric layer and a barrier layer on a substrate in...
Floating gate flash cell with extended floating gate
Provided is a floating gate flash cell and method for forming the same. The flash includes two floating gate transistors and a common source area therebetween....
Semiconductor device and manufacturing method thereof
A semiconductor device includes a first semiconductor layer formed of a nitride semiconductor on a substrate, a second semiconductor layer formed of a nitride...
Semiconductor device and method for manufacturing semiconductor device
To provide a semiconductor device in which the threshold value is controlled. Furthermore, to provide a semiconductor device in which a deterioration in...
Ultra high voltage semiconductor device with electrostatic discharge
A semiconductor device comprises a semiconductor substrate, a first layer over the semiconductor substrate, and a drain region in the first layer. The drain...
Semiconductor device with multiple space-charge control electrodes
A circuit including a semiconductor device having a set of space-charge control electrodes is provided. The set of space-charge control electrodes is located...
Semiconductor device with a charge carrier compensation structure and
method for the production of a...
A semiconductor device has a cell field with drift zones of a first type of conductivity and charge carrier compensation zones of a second type of conductivity...
High-resistive silicon substrate with a reduced radio frequency loss for a
radio-frequency integrated passive...
The application relates to a high-resistivity silicon substrate (100) with a reduced radio frequency loss for a radio frequency integrated passive device. The...
Methods for forming semiconductor materials in STI trenches
A method includes annealing a silicon region in an environment including hydrogen (H.sub.2) and hydrogen chloride (HCl) as process gases. After the step of...
Transistors with semiconductor interconnection layers and semiconductor
channel layers of different...
A transistor may include a semiconductor drift layer of a first semiconductor material and a semiconductor channel layer on the semiconductor drift layer. The...
Generation of highly N-type, defect passivated transition metal oxides
using plasma fluorine insertion
A new composition of matter is disclosed wherein oxygen vacancies in a semiconducting transition metal oxide such as titanium dioxide are filled with a halogen...
Compound semiconductor device, power source device and high frequency
amplifier and method for manufacturing...
A compound semiconductor device includes: a substrate; and a compound semiconductor lamination structure formed over the substrate, the compound semiconductor...
Group III nitride composite substrate and method for manufacturing the
same, laminated group III nitride...
A group III nitride composite substrate with a diameter of 75 mm or more includes a support substrate having a thickness t.sub.s of 0.1 mm or more and 1 mm or...
Strain relaxation using metal materials and related structures
Methods of fabricating semiconductor structures include forming a plurality of openings extending through a semiconductor material and at least partially...
Semiconductor device containing chalcogen atoms and method of
A semiconductor device includes a single crystalline semiconductor body with a first surface and a second surface parallel to the first surface. The...
This device includes a first base layer of a first conduction type. A second base-layer of a second conduction type is provided above the first base-layer. A...
MOSFET device with reduced breakdown voltage
A semiconductor device includes a drain region, an epitaxial layer overlaying the drain region, and an active region. The active region includes: a body...
Lateral PNP bipolar transistor with narrow trench emitter
A lateral bipolar transistor includes trench emitter and trench collector regions to form ultra-narrow emitter regions, thereby improving emitter efficiency....
A semiconductor component is disclosed. One embodiment provides a semiconductor body having a cell region with at least one zone of a first conduction type and...
Resonator having terminals and a method for manufacturing the resonator
A resonator and a method for manufacturing a resonator are provided. The method may include doping a wafer, and forming on the wafer a substrate, a drain...
Semiconductor device and method for manufacturing the same
A semiconductor device includes a first semiconductor region of a second conductivity type selectively formed in the main surface of the semiconductor substrate...
A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided...
Super-junction semiconductor device
Provision of a super-junction semiconductor device capable of reducing rises in transient on-resistance at the time of repeated switching operation. A...
A first impurity diffusion region is provided within a semiconductor substrate, a second impurity diffusion region is provided within the first impurity...
Small pitch patterns and fabrication method
A method is provided for fabricating small pitch patterns. The method includes providing a semiconductor substrate, and forming a target material layer having a...
A semiconductor device having a capacitor which includes a first electrode electrically coupled to a transistor and a second electrode separate from the first...
Metal-insulator-metal capacitor structures
Capacitor structures capable of providing both low-voltage capacitors and high-voltage capacitors are described herein. In one embodiment, a capacitor structure...