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Light-emitting diode lighting device
A light-emitting diode (LED) lighting device includes a substrate, a first bottom electrode, a bottom transparent isolation layer, a first vertical LED, a...
Semiconductor device and method for fabricating the same
A semiconductor device includes: a first substrate including a first surface layer that includes first and second electrodes; a second substrate including a...
In a semiconductor device, a lower chip includes a first group of connection terminals provided on a straight region including a corner region and a region...
Stack package and system-in-package including the same
A system-in-package includes first and second semiconductor chips disposed in a first region over a substrate, and a controller disposed in a second region over...
3-D integrated semiconductor device comprising intermediate heat spreading
In a three-dimensional chip configuration, a heat spreading material may be positioned between adjacent chips and also between a chip and a carrier substrate,...
Multi-die wirebond packages with elongated windows
A microelectronic package can include a substrate having first and second opposed surfaces extending in first and second transverse directions and an opening...
Method for electronic circuit assembly on a paper substrate
A methodology for a thin, flexible substrate having integrated passive circuit elements, and the resulting device are disclosed. Embodiments may include...
Methods for forming a semiconductor device package
A method of forming a semiconductor device package includes bonding a first connector to a first conductive structure on a first package. The method includes...
Variable temperature solders for multi-chip module packaging and
Various methods of mounting semiconductor chips on a substrate are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a...
Method for producing a photovoltaic module
A photovoltaic module having at least one photovoltaic cell may be produced. At least one photovoltaic cell may be arranged on a substrate, covering the...
Side wettable plating for semiconductor chip package
A method for providing a semiconductor chip package with side wettable plating includes singulating a semiconductor chip package from an array of packages...
Wafer level array of chips and method thereof
A wafer level array of chips is provided. The wafer level array of chips comprises a semiconductor wafer, and a least one extending-line protection. The...
Substrate and assembly thereof with dielectric removal for increased post
An interconnection substrate includes a plurality of electrically conductive elements of at least one wiring layer defining first and second lateral directions....
Through via package
An integrated circuit package includes an integrated circuit die in a reconstituted substrate. The active side is processed then covered in molding compound...
Bump structure having a side recess and semiconductor structure including
A bump structure includes a first end; and a second end opposite the first end. The bump structure further includes a side connected between the first end and...
Methods of fabricating semiconductor chip solder structures
Various semiconductor chip solder bump and underbump metallization (UBM) structures and methods of making the same are disclosed. In one aspect, a method is...
Self-alignment structure for wafer level chip scale package
A packaged semiconductor device includes a semiconductor substrate, a metal pad, a metal base, a polymer insulating layer, a copper-containing structure and a...
Method of forming a plurality of bumps on a substrate and method of
forming a chip package
A method of forming a plurality of bump structures on a substrate includes forming an under bump metallurgy (UBM) layer on the substrate, wherein the UBM layer...
Drive chip and display apparatus
This drive chip has a configuration that is provided with: a base main body; two terminal groups that are respectively disposed along the base main body sides...
Flip-chip hybridisation of two microelectronic components using a UV
A method of manufacturing a microelectronic device including a first component hybridized with a second component via electric interconnects, involves the steps...
Semiconductor packages and methods of forming the same
Embodiments of the present disclosure include semiconductor packages and methods of forming the same. An embodiment is a semiconductor package including a first...
Wirebond recess for stacked die
A first semiconductor device die is provided having a bottom edge incorporating a notch structure that allows sufficient height and width clearance for a wire...
Patterned conductive epoxy heat-sink attachment in a monolithic microwave
integrated circuit (MMIC)
A monolithic microwave integrated circuit structure having: a semiconductor substrate structure having a plurality of active devices and a microwave...
Semiconductor module having an integrated waveguide for radar signals
A semiconductor module, having an integrated circuit, a rewiring layer for externally connecting the integrated circuit, and at least one waveguide integrated...
Packaged semiconductor device, a semiconductor device and a method of
manufacturing a packaged semiconductor device
A packaged semiconductor device comprising a package and a semiconductor device is described. The semiconductor device comprises a first and a second GND-pad...
Semiconductor device and method of forming vertical structure
According to an exemplary embodiment, a method of forming a vertical structure with at least two barrier layers is provided. The method includes the following...
Metal deposition on substrates
Various techniques, methods, devices and apparatus are provided where an isolation layer is provided at a peripheral region of the substrate, and one or more...
Semiconductor device and manufacturing method thereof for protecting
metal-gate from oxidation
A semiconductor device and a manufacturing method thereof is provided. The method comprises: providing a substrate for the semiconductor device with a gate...
Structure designs and methods for integrated circuit alignment
Devices and methods for pattern alignment are disclosed. The device includes an assembly isolation region, a seal ring region around the assembly isolation...
Method for forming identification marks on refractory material single
crystal substrate, and refractory...
An identification mark formation method for forming an identification mark on a refractory material single crystal substrate that is made of one selected from...
Integrated fan-out package with dummy vias
Disclosed herein is a device comprising a first redistribution layer (RDL) having first lands disposed on a bottom surface of the first RDL and active contact...
Semiconductor device and method of forming sacrificial adhesive over
contact pads of semiconductor die
A semiconductor wafer contains a plurality of semiconductor die each having a plurality of contact pads. A sacrificial adhesive is deposited over the contact...
Formation of carbon-rich contact liner material
Conductive contact structure of a circuit structures and methods of fabrication thereof are provided. The fabrication includes, for instance, providing at least...
Interconnect structure and manufacturing method thereof
The present disclosure provides an interconnect structure, including a substrate, a first conductive feature over the substrate, a second conductive feature...
Semiconductor structures comprising at least one through-substrate via
filled with conductive materials
A method for selectively removing material from a substrate without damage to copper filling a via and extending at least partially through the substrate. The...
Moisture scavenging layer for thinner barrier application in beol
A method of forming a thinner barrier/liner stack for vias and metal lines and the resulting device are disclosed. Embodiments include forming a via through an...
Copper based nitride liner passivation layers for conductive copper
One illustrative method disclosed herein includes forming a trench/via in a layer of insulating material, forming a barrier layer in the trench/via, forming a...
Power line structure for semiconductor apparatus
A semiconductor apparatus has one or more semiconductor chips. The semiconductor apparatus may include a power supply pad; power lines disposed on one side of...
A plurality of unit MISFET elements connected in parallel with each other to make up a power MISFET are formed in an LDMOSFET forming region on a main surface...
A low cost, small scale semiconductor device including a trimming circuit having a fuse resistor is disclosed. By a trimming circuit being configured of a...
A shielded system for reducing energy dissipation from an RF component into a semiconductor substrate, the shielded system comprising: a semiconductor...
Integrated circuit having a MOM capacitor and method of making same
An integrated circuit can include a MOM capacitor formed simultaneously with other devices, such as finFETs. A dielectric layer formed on a substrate has a...
Stack of horizontally extending and vertically overlapping features,
methods of forming circuitry components,...
A method of forming circuitry components includes forming a stack of horizontally extending and vertically overlapping features. The stack has a primary portion...
Integrated structure in wafer level package
An embodiment device package includes a die having a conductive pillar and a molding compound extending along sidewalls of the die. The molding compound at...
Chip having two groups of chip contacts
A chip (1) has a substrate (2), an integrated circuit (3) provided on the substrate (2), a plurality of conductor zones (ME1, ME2, ME3, ME4, ME5) and a...
Flexible display substrate with wire in curved bending area
A flexible display substrate, a flexible organic light emitting display device, and a method of manufacturing the same are provided. The flexible display...
Semiconductor device and method of manufacturing the same
A semiconductor device includes a first bump that is located over a surface of a semiconductor element, and is formed on a first bump formation face distanced...
A semiconductor device includes: a wiring board including a first electrode pad on a surface thereof; a circuit board disposed to stand on the wiring board, and...
MCSP power semiconductor devices and preparation methods thereof
The present invention discloses the MCSP power semiconductor device and the preparation method thereof. In the present invention method, a metal foil layer is...
Leadless package type power semiconductor module
There is provided a leadless package type power semiconductor module. According to an exemplary embodiment of the present disclosure, the leadless package type...