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Patent # Description
US-9,317,466 Completion combining to improve effective link bandwidth by disposing at end of two-end link a matching engine...
An apparatus and method are disclosed in which unrelated completion operations intended for a single destination (requestor) are coalesced to improve achievable...
US-9,317,465 System and method of sending PCI express data over ethernet connection
According to certain aspects, the present invention relates to a system and method of sending PCI Express video data over a lower speed Ethernet connection. In...
US-9,317,464 Method, apparatus and system for configuring coupling with input-output contacts of an integrated circuit
Techniques and mechanisms for configuring an integrated circuit to couple to, and exchange data with, a hardware interface. In an embodiment, the integrated...
US-9,317,463 Systems and methods for smart remote-control devices
Various embodiments provide a smart remote-control device. In one embodiment, a smart remote-control device includes a keypad and a display. The...
US-9,317,462 Microcontroller peripheral data transfer redirection for resource sharing
A system includes one or more master modules configured to execute instructions embedded in non-transitory machine-readable media and controllable by a...
US-9,317,461 Use of host system resources by memory controller
A method for data storage includes, in a system that includes a host having a host memory and a memory controller that is separate from the host and stores data...
US-9,317,460 Program event recording within a transactional environment
A transaction is initiated within a computing environment, and based on detecting a program event recording event, an interrupt is presented for the...
US-9,317,459 Memory device distributed controller system
A memory device distributed controller circuit distributes memory control functions amongst a plurality of memory controllers. A master controller receives an...
US-9,317,458 System for converting a signal
A device for processing a signal includes a processing module used to process data in a domain. The device includes domain conversion hardware and memory, both...
US-9,317,457 Auto-waking of a suspended OS in a dockable system
A mobile computing device with a mobile operating system and desktop operating system running concurrently and independently on a shared kernel without...
US-9,317,456 Method and system for performing event-matching with a graphical processing unit
A computer-implemented method for event matching in a complex event processing system includes receiving, with a computer processing device, a stream of event...
US-9,317,455 Virtual switching of information handling device components
Systems, methods and products directed toward switching device components between multiple operating environments available on an information handling device....
US-9,317,454 Information processing apparatus, information processing method, and recording medium
An information processing apparatus includes a memory configured to store information that indicates a correspondence relationship between location information...
US-9,317,453 Client partition scheduling and prioritization of service partition work
A method in a data processing system is provided for processing a service request of a client partition. The method includes: obtaining by a service partition...
US-9,317,452 Selective restrictions to memory mapped registers using an emulator
A virtual machine environment in which a hypervisor provides direct memory mapped access by a virtual guest to a physical memory device. The hypervisor prevents...
US-9,317,451 Nonvolatile semiconductor storage device having encrypting arithmetic device
According to one embodiment, a nonvolatile semiconductor storage device includes an encrypting circuit for operating in a predetermined encrypting system, a...
US-9,317,450 Security protection for memory content of processor main memory
Subject matter disclosed herein relates to memory devices and security of same.
US-9,317,449 Secure key access with one-time programmable memory and applications thereof
A device includes a key store memory that stores one or more cryptographic keys. A rule set memory stores a set of rules for accessing the cryptographic keys. A...
US-9,317,448 Methods and apparatus related to data processors and caches incorporated in data processors
A cache includes a cache array and a cache controller. The cache array has a multiple number of entries. The cache controller is coupled to the cache array, for...
US-9,317,447 Systems and methods for background destaging storage tracks
Storage tracks from at least one host are destaged from the write cache rank when it is determined that the at least one host is idle with respect to a first...
US-9,317,446 Multi-level paging and address translation in a network environment
An example method for facilitating multi-level paging and address translation in a network environment is provided and includes receiving a request for memory...
US-9,317,445 Rapid memory buffer write storage system and method
Efficient and convenient storage systems and methods are presented. In one embodiment a storage system includes a host for processing information, a memory...
US-9,317,444 Latency reduction for direct memory access operations involving address translation
Latency reduction for direct memory access operations involving address translation is disclosed. Example methods disclosed herein to perform direct memory...
US-9,317,443 Managing translations across multiple contexts using a TLB with entries directed to multiple privilege levels...
For a current context in control of a processor requesting access to a particular address, a translation lookaside buffer (TLB) controller specifies a virtual...
US-9,317,442 Direct memory access (DMA) address translation with a consecutive count field
DMA translation table entries include a consecutive count (CC) field that indicates how many subsequent translation table entries point to successive real page...
US-9,317,441 Indexed page address translation to reduce memory footprint in virtualized environments
Embodiments of systems, apparatuses, and methods for performing guest logical memory address to host physical memory address translation are described. In some...
US-9,317,440 Computing device and virtual device control method for controlling virtual device by computing system
A virtual device control method of a computing device which includes a nonvolatile memory is provided. The virtual device control method includes receiving a...
US-9,317,439 System supporting multiple partitions with differing translation formats
A system configuration is provided with multiple partitions that supports different types of address translation structure formats. The configuration may...
US-9,317,438 Cache memory apparatus, cache control method, and microprocessor system
A cache memory apparatus according to the present invention includes a cache memory that caches an instruction code corresponding to a fetch address and a cache...
US-9,317,437 Active memory processor system
In general, the present invention relates to data cache processing. Specifically, the present invention relates to a system that provides reconfigurable dynamic...
US-9,317,436 Cache node processing
A technique for cache node processing that includes generating a cache node in response to a request to write data to storage devices. If logical block address...
US-9,317,435 System and method for an efficient cache warm-up
Described herein is a system and method for an efficient cache warm-up. The system and method may copy data blocks from a primary storage device to a cache...
US-9,317,434 Managing out-of-order memory command execution from multiple queues while maintaining data coherency
Responsive to selecting a particular queue from among at least two queues to place an incoming event into within a particular entry from among multiple entries...
US-9,317,433 Multi-core processing system having cache coherency in dormant mode
Some of the embodiments of the present disclosure provide a multi-core processing system configured to selectively enter a dormant mode, comprising: a plurality...
US-9,317,432 Methods and systems for consistently replicating data
Techniques for maintaining consistent replicas of data are disclosed. By way of example, a method for managing copies of objects within caches, in a system...
US-9,317,431 Address generator, address generation method, and encapsulation-decapsulation device
An address generator includes a storage device in which one or more second-protocol-family address prefixes are stored, the one or more second-protocol-family...
US-9,317,430 Controlling a dynamically instantiated cache
A change in workload characteristics detected at one tier of a multi-tiered cache is communicated to another tier of the multi-tiered cache. Multiple caching...
US-9,317,429 Apparatus and method for implementing a multi-level memory hierarchy over common memory channels
A system and method are described for integrating a memory and storage hierarchy including a non-volatile memory tier within a computer system. In one...
US-9,317,428 Supporting multiple types of guests by a hypervisor
A system configuration is provided that includes multiple partitions that have differing translation mechanisms associated therewith. For instance, one...
US-9,317,427 Reallocating unused memory databus utilization to another processor when utilization is below a threshold
According to one aspect of the present disclosure a method and technique for managing memory access is disclosed. The method includes setting a memory databus...
US-9,317,426 Write once read many media methods
A method for providing for write once read many (WORM) times from at least some addresses of a storage drive that is otherwise manufactured for multiple writes...
US-9,317,425 Memory management method in embedded system
A memory management method in an embedded system is provided. The method includes a first iteration step that sequentially allocates and deletes memory, and...
US-9,317,424 Storage device and information processing system
A storage device able to make a redundant write operation of unselected data unnecessary and able to optimize an arrangement of pages to a state having a high...
US-9,317,423 Storage system which realizes asynchronous remote copy using cache memory composed of flash memory, and control...
The first storage apparatus provides a primary logical volume, and the second storage apparatus has a secondary logical volume. When the first storage apparatus...
US-9,317,422 Secure erase of data in electronic device
A method of secure erase of an electronic device that applies a predetermined voltage to a device. The voltage is selected to be high enough to quickly destroy...
US-9,317,421 Memory management
Apparatus, systems, and methods to manage memory operations are described. In one embodiment, an electronic device comprises a processor and a memory control...
US-9,317,420 Computer program installation across multiple memories
Embodiments herein are directed to a method for installing a program across multiple memories. The method includes calculating a memory space requirement of the...
US-9,317,419 System and method for thin provisioning
A method, computer program product, and computing system for grouping storage blocks within a file system into a plurality of storage pools including a...
US-9,317,418 Non-volatile memory storage apparatus, memory controller and data storing method
A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a...
US-9,317,417 Smart digital message archival
A device may receive information identifying an attribute to be used when determining whether to archive a digital message. The attribute may be associated with...
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