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Patent # Description
US-9,324,881 Semiconductor device and manufacturing method thereof
A semiconductor device includes an oxide semiconductor layer including a crystalline region over an insulating surface, a source electrode layer and a drain...
US-9,324,880 Thin film transistor and method of producing the same, display device, image sensor, X-ray sensor, and X-ray...
A thin film transistor includes a gate electrode; a gate insulating film which contacts the gate electrode; an oxide semiconductor layer which includes a first...
US-9,324,879 Thin film transistor, method for manufacturing same, and display device
According to one embodiment, a thin film transistor includes a substrate, a gate electrode, a first insulating film, an oxide semiconductor film, a second...
US-9,324,878 Semiconductor device and method for manufacturing the same
It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor...
US-9,324,877 Semiconductor device, power diode, and rectifier
An object is to provide a semiconductor device having electrical characteristics such as high withstand voltage, low reverse saturation current, and high...
US-9,324,876 Semiconductor device and method for manufacturing the same
A semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide...
US-9,324,875 Semiconductor device
A semiconductor device includes a transistor which includes a gate electrode, a gate insulating film in contact with the gate electrode, and a stacked-layer...
US-9,324,874 Display device comprising an oxide semiconductor
A pixel portion and a driver circuit driving the pixel portion are formed over the same substrate. At least a part of the driver circuit is formed using an...
US-9,324,873 Fabricating method of thin film transistor, thin film transistor and display panel
Embodiments of the invention provide a fabricating method a thin film transistor, a thin film transistor and a display panel, so as to improve carrier mobility...
US-9,324,872 Back gate single-crystal flexible thin film transistor and method of making
A gate dielectric material and a gate conductor portion are formed on a single-crystal semiconductor material of a substrate. A dielectric structure is then...
US-9,324,871 Semiconductor device
A semiconductor device including a transistor having excellent electrical characteristics is provided. Alternatively, a semiconductor device having a high...
US-9,324,870 Fin field effect transistor including asymmetric raised active regions
Merged and unmerged raised active regions on semiconductor fins can be simultaneously formed on a same substrate by control of growth rates of a deposited...
US-9,324,869 Method of forming a semiconductor device and resulting semiconductor devices
The present disclosure provides, in various aspects, a method of forming a semiconductor device and accordingly formed semiconductor devices. In accordance with...
US-9,324,868 Epitaxial growth of silicon for FinFETS with non-rectangular cross-sections
FinFET devices with epitaxially grown fins and methods for fabricating them are provided. Embodiments include forming at least two shallow trench isolation...
US-9,324,867 Method to controllably etch silicon recess for ultra shallow junctions
A method of forming a semiconductor device that includes forming a germanium including material on source and drain region portions of a silicon containing fin...
US-9,324,866 Structure and method for transistor with line end extension
The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate; an isolation feature formed in the...
US-9,324,865 Method of forming a semiconductor device
A semiconductor device having dislocations and a method of fabricating the semiconductor device is disclosed. The exemplary semiconductor device and method for...
US-9,324,864 Semiconductor device structure and method for forming the same
A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes...
US-9,324,863 Semiconductor device
A semiconductor device includes a source/drain feature in a substrate. The source/drain feature has an upper portion and a lower portion, the upper portion...
US-9,324,862 Semiconductor device
To prevent a current leak in an impurity region surrounding a transistor, in a region where a portion, of a second conductivity type region, extending from a...
US-9,324,861 Semiconductor device
A semiconductor device has on a semiconductor layer: a gate insulating film formed, extending from a second emitter region toward a buffer region beyond a first...
US-9,324,860 Semiconductor device
According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, an...
US-9,324,859 Semiconductor device and method of forming the same
A split gate trench field effect transistor includes a gate electrode formed in a trench. A shield gate is formed in a trench below the gate electrode and...
US-9,324,858 Trench-gated MIS devices
In a trench-gated MIS device contact is made to the gate within the trench, thereby eliminating the need to have the gate material, typically polysilicon,...
US-9,324,857 Semiconductor device manufacturing method
A semiconductor device includes a p-type semiconductor layer, n-type column regions formed of columnar thermal donors exhibiting an n-type property, a p-type...
US-9,324,856 MOSFET having dual-gate cells with an integrated channel diode
A semiconductor device includes MOSFET cells having a drift region of a first conductivity type. A first and second active area trench are in the drift region....
US-9,324,855 Lateral power device having low specific on-resistance and using high-dielectric constant socket structure and...
Provided is a lateral power device having low specific ON-resistance and using a high-dielectric constant socket structure and a manufacturing method therefor,...
US-9,324,854 Semiconductor device comprising self-aligned contact elements and a replacement gate electrode structure
A semiconductor device includes a high-k metal gate electrode structure that is positioned above an active region, has a top surface that is positioned at a...
US-9,324,853 III-V semiconductor device having self-aligned contacts
A method including forming a pair of inner spacers along a vertical sidewall of a gate trench, gate trench extending into a III-V compound ...
US-9,324,852 Semiconductor device including a gate electrode on a protruding group III-V material layer
A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate,...
US-9,324,851 DC/DC converter circuit of semiconductor device having a first transistor of a normally-off type and a second...
A semiconductor device including a DC/DC converter circuit, in which the DC/DC converter circuit includes a transistor of a normally-off type, having a first...
US-9,324,850 Integrated circuit devices and fabricating method thereof
An integrated circuit device includes a first transistor having a first channel between a first source/drain, and a second transistor having a second channel...
US-9,324,849 Structures and techniques for using semiconductor body to construct SCR, DIAC, or TRIAC
Switch devices, such as Silicon Controlled Rectifier (SCR), DIAC, or TRIAC, on a semiconductor body are disclosed. P/N junctions can be built on a semiconductor...
US-9,324,848 Semiconductor device
A semiconductor device includes a first conductivity-type drift layer, a second conductivity-type base layer formed in a front surface portion of the drift...
US-9,324,847 Semiconductor device and semiconductor device manufacturing method
In some aspects of the invention, an n-type field-stop layer can have a total impurity of such an extent that a depletion layer spreading in response to an...
US-9,324,846 Field plate in heterojunction bipolar transistor with improved break-down voltage
A method of forming a heterojunction bipolar transistor including a field plate. The method may include forming: a substrate having a selectively implanted...
US-9,324,845 ESD protection structure, integrated circuit and semiconductor device
Implementations are presented herein that include an ESD protection structure. The structure may include a plurality of first doped regions forming first...
US-9,324,844 Method and system for a GaN vertical JFET utilizing a regrown channel
A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and...
US-9,324,843 High germanium content silicon germanium fins
Thermal condensation is employed to obtain a finned structure including strained silicon germanium fins having vertical side walls and a germanium content that...
US-9,324,842 Buried local interconnect in finfet structure and method of fabricating same
A method for fabricating a finfet with a buried local interconnect and the resulting device are disclosed. Embodiments include forming a silicon fin on a BOX...
US-9,324,841 Methods for preventing oxidation damage during FinFET fabrication
Embodiments of the present invention provide improved methods for fabricating field effect transistors such as finFETs. Stressor regions are used to increase...
US-9,324,839 Graphene structure, graphene device including same, and method of manufacturing graphene structure
A method of manufacturing a graphene structure, the graphene structure, and a graphene device including the graphene structure, include depositing a metal layer...
US-9,324,838 LDMOS power semiconductor device and manufacturing method of the same
An electronic semiconductor device comprising: a semiconductor body, having a first side and a second side opposite to one another and including a first...
US-9,324,837 Semiconductor device with vertical gate and method of manufacturing the same
A gate electrode is formed in a trench reaching a drain region so as to leave a concave portion on the top of the trench. A first insulating film is formed,...
US-9,324,836 Methods and apparatus for doped SiGe source/drain stressor deposition
A method of manufacturing a semiconductor device includes etching a recess into a substrate and epitaxially growing a source/drain region in the recess. The...
US-9,324,835 Method for manufacturing MOSFET
A method for manufacturing a MOSFET, including: performing ion implantation, via a shallow trench surrounding an active region in a semiconductor substrate,...
US-9,324,834 Semiconductor device having embedded strain-inducing pattern and method of forming the same
In a semiconductor device, a first active region has a first .SIGMA.-shape, and the second active region has a second .SIGMA.-shape. When a line that is...
US-9,324,833 Methods of manufacturing semiconductor devices
Methods of forming semiconductor devices are disclosed. In some embodiments, a first trench and a second trench are formed in a substrate, and dopants of a...
US-9,324,832 Methods of manufacturing semiconductor devices using masks having varying widths
In a method, a dummy gate layer structure and a mask layer are formed on a substrate. The mask layer is patterned to form masks. Spacers are formed on sidewalls...
US-9,324,831 Forming transistors without spacers and resulting devices
Methods for forming gates without spacers and the resulting devices are disclosed. Embodiments may include forming a channel layer on a substrate; forming a...
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