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Patent # Description
US-9,331,223 Solar cell module and photovoltaic power generation system including the same
A solar cell module is disclosed. The solar cell module includes a solar cell panel, and a frame disposed at a periphery of the solar cell panel. A fixing hole...
US-9,331,222 Photovoltaic device
A photovoltaic device comprising: a base (1), a photovoltaic assembly (8) and a baffle plate (5), wherein the photovoltaic assembly is arranged in an inclined...
US-9,331,221 Lift-off layer for separation and disposal of energy conversion devices
Separation layers, usable in devices for converting radiation energy to electrical energy, allow at least some of the components of the devices to be separated...
US-9,331,220 Three-dimensional conductive electrode for solar cell
A photovoltaic device and method include forming a plurality of pillar structures in a substrate, forming a first electrode layer on the pillar structures and...
US-9,331,219 Integrated circuit with directional light sensor, device including such an IC and method of manufacturing such...
Disclosed is an integrated circuit comprising a substrate having a major surface; a directional light sensor, the directional light sensor comprising a...
US-9,331,218 Solar cell module and method of manufacturing the same
Provided are a solar cell module and a method of manufacturing the same. The solar cell module including: a substrate; a bottom electrode layer discontinuously...
US-9,331,217 Electronic gate enhancement of Schottky junction solar cells
Various systems and methods are provided for Schottky junction solar cells. In one embodiment, a solar cell includes a mesh layer formed on a semiconductor...
US-9,331,216 Core-shell nickel alloy composite particle metallization layers for silicon solar cells
Materials and methods for fabrication of rear tabbing, front busbar, and fine grid line layers for silicon based photovoltaic cells are disclosed. Materials...
US-9,331,215 Halogen-free, fireproof, transparent thermoplastic compositions having high thermomechanical strength, in...
A transparent, fireproof thermoplastic composition which is free from halogen compounds and includes a polyamide-block graft copolymer formed by a polyolefin...
US-9,331,214 Diode cell modules
Diode cell modules for use within photovoltaic systems, including lead frames including first leads extending from the first outlet terminal, second leads...
US-9,331,213 Integrated power connectors for PV modules and their methods of manufacture
Photovoltaic devices are provided that include a thin film stack (of a plurality of photovoltaic cells connected in series to each other) on a transparent...
US-9,331,212 Semiconductor device comprising an antiferroelectric gate insulating film
A semiconductor device having a transistor gate length greatly reduced as a result of promotion of semiconductor integrated circuit miniaturization where...
US-9,331,211 PN junctions and methods
A PN junction includes first and second areas of silicon, wherein one of the first and second areas is n-type silicon and the other of the first and second...
US-9,331,210 Field effect transistor and method for manufacturing semiconductor device
A structure with which the zero current of a field effect transistor using a conductor-semiconductor junction can be reduced is provided. A floating electrode...
US-9,331,209 Nonvolatile memory and three-state FETs using cladded quantum dot gate structure
The present invention discloses structures and method of fabricating cladded quantum dot gate nonvolatile memory and three-state field-effect transistor devices...
US-9,331,208 Oxide semiconductor film and semiconductor device
An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide...
US-9,331,207 Oxide semiconductor device and manufacturing method therof
A semiconductor device includes a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film in contact with the gate...
US-9,331,206 Oxide material and semiconductor device
Stable electrical characteristics are given to a transistor and a highly reliable semiconductor device is provided. In addition, an oxide material which enables...
US-9,331,205 VTFT with post, cap, and aligned gate
A thin film transistor includes a post on a substrate. The post has a height dimension extending away from the substrate to a top, and an edge along the height...
US-9,331,204 High voltage field effect transistors and circuits utilizing the same
A high-voltage circuit is described that comprises a high-voltage finFET can have a semiconductor fin with an insulating cap on the fin. A gate dielectric is...
US-9,331,203 Devices with cavity-defined gates and methods of making the same
Disclosed are methods, systems and devices, including a method that includes the acts of forming a semiconductor fin, forming a sacrificial material adjacent...
US-9,331,202 Replacement gate structure on FinFET devices with reduced size fin in the channel region
One illustrative method disclosed herein includes, among other things, forming a fin protection layer around a fin, forming a sacrificial gate electrode above a...
US-9,331,201 Multi-height FinFETs with coplanar topography background
A semiconductor structure is provided that has semiconductor fins having variable heights without any undue topography. The semiconductor structure includes a...
US-9,331,200 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon; and forming...
US-9,331,199 Semiconductor device
Provided is a semiconductor device to which a pattern structure for performance improvement is applied. The semiconductor device includes first and second...
US-9,331,198 Controlled epitaxial boron nitride growth for graphene based transistors
We have demonstrated controlled growth of epitaxial h-BN on a metal substrate using atomic layer deposition. This permits the fabrication of devices such as...
US-9,331,197 Vertical power transistor device
A power metal-oxide-semiconductor field-effect transistor (MOSFET) includes a substrate, a drift layer over the substrate, and a spreading layer over the drift...
US-9,331,196 Semiconductor device
A semiconductor device including a gate structure, a source region, a drain region, a first conductive type epitaxial layer, a high voltage second conductive...
US-9,331,195 Source tip optimization for high voltage transistor devices which includes a P-body extension region
The present disclosure provides a method for fabricating a high-voltage semiconductor device. The method includes designating first, second, and third regions...
US-9,331,194 Semiconductor device and method for manufacturing semiconductor device
A MOS semiconductor device has a MOS structure, including a p.sup.- region that surrounds an n.sup.+-type source region and has a net doping concentration lower...
US-9,331,193 Circuit arrangement
A circuit arrangement with at least a source contact (7), a gate contact (6), and a Schottky-Reverse contact (2), which is embodied as a Schottky-contact above...
US-9,331,192 Low dislocation density group III nitride layers on silicon carbide substrates and methods of making the same
Group III nitride semiconductor device structures are provided that include a silicon carbide (SiC) substrate and a Group III nitride epitaxial layer above the...
US-9,331,191 GaN device with reduced output capacitance and process for making same
A GaN transistor with reduced output capacitance and a method form manufacturing the same. The GaN transistor device includes a substrate layer, one or more...
US-9,331,190 Compound semiconductor device and method of manufacturing the same
An intermediate layer composed of i-AlN is formed between a channel layer and an electron donor layer, a first opening is formed in an electron donor layer, at...
US-9,331,189 Low voltage nanoscale vacuum electronic devices
An electronic device including a first conducting layer, a second conducting layer, and an insulating layer provided between the conducting layers. At least one...
US-9,331,188 Short-circuit protection circuits, system, and method
Systems, circuits, and methods for protecting an Insulated-Gate Bipolar Transistor (IGBT) from short-circuit events are provided. A short-circuit protection...
US-9,331,187 Bipolar transistor
P-type second semiconductor layers each interposed between a corresponding pair of n-type first semiconductor layers reduce the apparent doping concentration in...
US-9,331,186 Semiconductor device with multilayer contact and method of manufacturing the same
The present invention provides a semiconductor with a multilayered contact structure. The multilayered structure includes a metal contact placed on an active...
US-9,331,185 Non-volatile memory device with undercut ONO trapping structure and manufacturing method thereof
A method for manufacturing a non-volatile memory structure includes providing a substrate having a gate structure, performing a first oxidation process to form...
US-9,331,184 Sonos device and method for fabricating the same
A silicon-oxide-nitride-oxide-silicon (SONOS) device is disclosed. The SONOS device includes a substrate; a first oxide layer on the substrate; a silicon-rich...
US-9,331,183 Semiconductor device and fabrication method thereof
A semiconductor device including a first gate structure and a second gate structure immediately adjacent to each other with a spacer therebetween. Line width of...
US-9,331,182 Semiconductor devices with a gate conductor formed as a spacer, and methods for manufacturing the same
Semiconductor devices and methods for manufacturing the same are disclosed. In one aspect, the method comprises forming a first shielding layer on a substrate,...
US-9,331,181 Nanodot enhanced hybrid floating gate for non-volatile memory devices
A memory device and a method of making a memory device that includes a semiconductor channel, a tunnel dielectric layer located over the semiconductor channel,...
US-9,331,180 Semiconductor device and method for fabricating thereof
A silicon nitride film, which is a second hard mask, is dry etched to be removed completely. The silicon nitride film, which is formed on a sidewall of a...
US-9,331,179 Metal gate and gate contact structure for FinFET
An embodiment includes a substrate, wherein a portion of the substrate extends upwards, forming a fin, a gate dielectric over a top surface and sidewalls of the...
US-9,331,178 Method for manufacturing non-planar field effect transistor having a semiconductor fin
A method for manufacturing a semiconductor device includes forming two isolation structures in a substrate to define a fin structure between the two isolation...
US-9,331,177 Semiconductor structure with deep trench thermal conduction
Diodes and resistors for integrated circuits are provided. Deep trenches (DTs) are integrated into the diodes and resistors for the purposes of thermal...
US-9,331,176 Methods of forming field effect transistors, including forming source and drain regions in recesses of...
Methods of forming a fin-shaped Field Effect Transistor (FinFET) are provided. The methods may include selectively incorporating source/drain extension-region...
US-9,331,175 Method of locally stressing a semiconductor layer
The disclosure concerns a method of stressing a semiconductor layer comprising: depositing, over a semiconductor on insulator (SOI) structure having a...
US-9,331,174 Method for improving device performance using epitaxially grown silicon carbon (SiC) or silicon-germanium (SiGe)
A semiconductor substrate including a field effect transistor (FET) and a method of producing the same wherein a stressor is provided in a recess before the...
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