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Patent # Description
US-9,337,068 Oxygen-containing ceramic hard masks and associated wet-cleans
A method of forming an oxygen-containing ceramic hard mask film on a semiconductor substrate involves receiving a semiconductor substrate in a plasma-enhanced...
US-9,337,067 High temperature electrostatic chuck with radial thermal chokes
A wafer support assembly including a wafer support and cooling plate with radial thermal chokes is provided. The cooling plate and wafer support may have...
US-9,337,066 Wafer cleaning module
The present disclosure relates to a wafer cleaning module for post CMP processes that reduces defects (e.g., watermarks, deposited particles) on a substrate,...
US-9,337,065 Systems and methods for drying a rotating substrate
A system for drying a surface of a substrate is provided. The system for drying a surface of a substrate comprising: a rotary support; a first dispenser fluidly...
US-9,337,064 Methods of protecting peripheries of in-process semiconductor wafers and related in-process wafers and systems
Methods of processing semiconductor wafers may involve, for example, encapsulating an active surface and each side surface of a wafer of semiconductor material,...
US-9,337,063 Package for three dimensional integrated circuit
A wafer level package includes a semiconductor die bonded on a supporting wafer. The semiconductor die has at least a step recess at its substrate. An underfill...
US-9,337,062 High frequency module and manufacturing method thereof
A high frequency module includes: a semiconductor chip provided over a first surface side of a resin layer; a first waveguide provided over the first surface...
US-9,337,061 Fabrication method of semiconductor package
A fabrication method of a semiconductor package is disclosed, which includes the steps of: providing a carrier; disposing at least a semiconductor element on...
US-9,337,060 Filling materials and methods of filling through holes for improved adhesion and hermeticity in glass...
A glass substrate and method of processing the glass substrate for use in semi-conductor packaging applications. The glass substrate has top surface and a...
US-9,337,059 Apparatus and methods for annealing wafers
A method includes performing an anneal on a wafer. The wafer includes a wafer-edge region, and an inner region encircled by the wafer-edge region. During the...
US-9,337,058 Method for reducing nonuniformity of forward voltage of semiconductor wafer
There is provided a method for reducing the nonuniformity of forward voltage Vf of an N-type semiconductor wafer in which density of impurities included in an...
US-9,337,057 Semiconductor device and method for fabricating the same
Provided are methods for fabricating semiconductor devices. The methods for fabricating the semiconductor devices may include forming a first interlayer...
US-9,337,056 Semiconductor device manufacturing method
A semiconductor device manufacturing method for etching a multilayer film using a mask is provided. The method includes (a) supplying a first gas containing...
US-9,337,055 Chemical circulation system and methods of cleaning chemicals
A method includes passing a chemical solution through a metal-ion absorber, wherein metal ions in the metal-ion absorber are trapped by the metal-ion absorber....
US-9,337,054 Precursors for silicon dioxide gap fill
A full fill trench structure is described, including a microelectronic device substrate having a high aspect ratio trench therein and filled with silicon...
US-9,337,053 Method of forming contacts for a memory device
The present invention is generally directed to a method of forming contacts for a memory device. In one illustrative embodiment, the method includes forming a...
US-9,337,052 Silicon-containing EUV resist underlayer film forming composition
A resist underlayer film forming composition for EUV lithography, comprising: as a silane, a hydrolyzable silane, a hydrolyzate of the hydrolyzable silane, a...
US-9,337,051 Method for critical dimension reduction using conformal carbon films
Embodiments of the disclosure generally provide a method of forming a reduced dimension pattern in a hardmask that is optically matched to an overlying...
US-9,337,050 Methods of forming fins for finFET semiconductor devices and the selective removal of such fins
One illustrative method disclosed herein includes, among other things, forming an inverted, generally T-shaped mandrel feature having a base mandrel structure...
US-9,337,049 Manufacturing method of wafer level chip scale package structure
A manufacturing method of wafer level chip scale package structure is provided. Firstly, a wafer including a plurality of semiconductor devices is provided. An...
US-9,337,048 Method for disconnecting polysilicon stringers during plasma etching
A method of fabricating wordlines in semiconductor memory structures is disclosed that eliminates stringers between wordlines while maintaining a stable...
US-9,337,047 Semiconductor device and method of making semiconductor device
One or more embodiments are related to a semiconductor device, comprising: a high-K dielectric material; and a nitrogen-doped silicon material disposed over...
US-9,337,046 System and method for mitigating oxide growth in a gate dielectric
Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in...
US-9,337,045 Methods of forming a semiconductor circuit element and semiconductor circuit element
The present disclosure provides a method of forming a semiconductor circuit element and a semiconductor circuit element, wherein the semiconductor circuit...
US-9,337,044 System and method for mitigating oxide growth in a gate dielectric
Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in...
US-9,337,043 Metal gate transistor and method for forming the same
Various embodiments provide metal gate transistors and methods for forming the same. In an exemplary method, a substrate having a top surface and a back surface...
US-9,337,042 Method for fabricating a metal high-k gate stack for a buried recessed access device
A method for fabricated a buried recessed access device comprising etching a plurality of gate trenches in a substrate, implanting and activating a source/drain...
US-9,337,041 Anisotropic dielectric material gate spacer for a field effect transistor
Capacitive coupling between a gate electrode and underlying portions of the source and drain regions can be enhanced while suppressing capacitive coupling...
US-9,337,040 Angled ion beam processing of heterogeneous structure
A method for fabricating a multilayer structure includes providing a mask on a device stack disposed on the substrate, the device stack comprising a first...
US-9,337,039 Method for electrical activation of dopant species in a GaN film
The method includes the steps of a) Providing a stack having a support substrate and a film of GaN having dopant species, b) Directly bonding a shielding layer...
US-9,337,037 Method for obtaining a heterogeneous substrate for the production of semiconductors
A method for obtaining a heterogeneous substrate intended for use in the production of a semiconductor comprises the following steps: (a) obtaining a first...
US-9,337,036 Method of forming copper sulfide film for reducing copper oxidization and loss
Effects of copper oxide formation in semiconductor manufacture are mitigated by etching with sulfide plasmas. The plasmas form protective copper sulfide films...
US-9,337,035 Semiconductor device and method of manufacturing the same
A semiconductor device includes a first electrode, a second electrode, a first semiconductor layer of a first conductivity type located between the first...
US-9,337,034 Method for producing a MOS stack on a diamond substrate
The invention relates to a method for producing a component comprising a conductive grid insulated from a semiconductor monocrystalline diamond substrate by an...
US-9,337,033 Dielectric tone inversion materials
A process for patterning a hard mask material with line-space patterns below a 30 nm pitch and a 15 nm critical dimension by employing a spin-on ...
US-9,337,032 Method of forming pattern of semiconductor device
A method of forming a pattern of a semiconductor device includes providing a substrate, forming a photoresist layer by coating a resist composition including an...
US-9,337,031 Semiconductor devices and methods of manufacturing the same
A method of manufacturing a semiconductor device includes partially removing an upper portion of an active fin of a substrate loaded in a chamber to form a...
US-9,337,030 Method to grow in-situ crystalline IGZO using co-sputtering targets
A co-sputter technique is used to deposit In--Ga--Zn--O films using PVD. The films are deposited in an atmosphere including both oxygen and argon. A heater...
US-9,337,029 Structure including gallium nitride substrate and method of manufacturing the gallium nitride substrate
A structure includes a silicon substrate, a plurality of silicon rods on the silicon substrate, a silicon layer on the plurality of silicon rods, and a GaN...
US-9,337,028 Passivation of group III-nitride heterojunction devices
Passivation of group III-nitride hetero junction devices is described herein. The passivation facilitates simultaneous realization of effective/high current...
US-9,337,027 Method of manufacturing substrates having improved carrier lifetimes
This invention relates to a method for depositing silicon carbide material onto a substrate such that the resulting substrate has a carrier lifetime of 0.5-1000...
US-9,337,026 Graphene growth on a carbon-containing semiconductor layer
A semiconductor-carbon alloy layer is formed on the surface of a semiconductor substrate, which may be a commercially available semiconductor substrate such as...
US-9,337,025 Method of laser separation of the epitaxial film or of the epitaxial film layer from the growth substrate of...
The present invention proposes variations of the laser separation method allowing separating homoepitaxial films from the substrates made from the same...
US-9,337,024 Methods and structures for preparing single crystal silicon wafers for use as substrates for epitaxial growth...
This document describes the fabrication and use of ceramic stabilizing layer fabricated right on the product silicon wafer to facilitate its use as a substrate...
US-9,337,023 Buffer stack for group IIIA-N devices
A method of fabricating a multi-layer epitaxial buffer layer stack for transistors includes depositing a buffer stack on a substrate. A first voided Group...
US-9,337,022 Virtual relaxed substrate on edge-relaxed composite semiconductor pillars
A method of creating a virtual relaxed substrate includes providing a bulk semiconductor substrate, and creating a layer of strained semiconductor material on...
US-9,337,021 Thin film structure and method of fabricating the same
Provided are a thin film structure capable of remarkably reducing the defect density of gallium nitride (GaN), and a method of fabricating the same. The thin...
US-9,337,020 Resist mask processing method using hydrogen containing plasma
A method for processing a resist mask includes: (a) a step of preparing, in a processing chamber, a target object to be processed having a patterned resist mask...
US-9,337,019 Method for manufacturing electronic component, and electronic component
Provided is a method for producing an electronic component, which is capable of forming a cured adhesive layer easily with high accuracy. The method for...
US-9,337,018 Methods for depositing films with organoaminodisilane precursors
A method for forming a silicon-containing film on at least one surface of a substrate by a deposition process selected from a chemical vapor deposition process...
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