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Patent # Description
US-9,336,916 Tc-99m produced by proton irradiation of a fluid target system
Methods for producing Tc-99m radioisotope by proton irradiation of a fluid target matrix. A method of producing Tc-99m includes irradiating a fluid target...
US-9,336,915 Target apparatus and isotope production systems and methods using the same
A target apparatus for a radioisotope production system. The target apparatus includes a production chamber that is configured to contain a starting liquid. The...
US-9,336,914 Radioactive waste solidification method
A radioactive waste (zeolite to which Cs-137 was adsorbed) in a waste tank and a glass raw material (soda lime glass) in a glass raw material tank are supplied...
US-9,336,913 Radioactive organic waste treatment method
Disclosed is a method for treating a radioactive organic waste, the radioactive organic waste including a cation exchange resin adsorbing radionuclide ions, the...
US-9,336,912 Product cartridge for radionuclide
A product cartridge for a radionuclide including a product vial having a permeable cap and surrounded by a radiation shield and a filling cartridge having a...
US-9,336,911 Core thermal limit value monitoring device, core monitoring system and core thermal limit value monitoring method
According to an embodiment, core thermal limit monitoring device is provided with calculating units, and signal input processing units, synchronization...
US-9,336,910 Control rod/control rod drive mechanism couplings
A nuclear reactor includes a pressure vessel, and a control rod assembly including at least one movable control rod comprising a neutron absorbing material, a...
US-9,336,909 Deposition of integrated protective material into zirconium cladding for nuclear reactors by high-velocity...
A zirconium alloy nuclear reactor cylindrical cladding has an inner Zr substrate surface (10), an outer volume of protective material (22) consisting of Zr--Al,...
US-9,336,908 Pressurized water reactor with upper vessel section providing both pressure and flow control
A pressurized water reactor (PWR) includes a vertical cylindrical pressure vessel having a lower portion containing a nuclear reactor core and a vessel head...
US-9,336,907 Pressure-tube reactor with coolant plenum
A pressure-tube nuclear reactor can include an outer shell having an interior to contain a moderator at a first pressure and a coolant plenum to receive the...
US-9,336,906 Semiconductor memory devices including redundancy memory cells
A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality...
US-9,336,905 Repair circuit and semiconductor apparatus using the same
A repair circuit includes a fuse set latch array including a plurality of fuse set latches, and configured to store fuse informations in target fuse latches...
US-9,336,904 Semiconductor apparatus
A semiconductor apparatus includes a plurality of memory blocks including a plurality of unit memory blocks, respectively, a first area extending in a first...
US-9,336,903 Semiconductor apparatus
A semiconductor apparatus includes an input buffer configured to buffer data inputted through a data input/output pad; a data input control unit configured to...
US-9,336,902 Semiconductor memory device, test control system, and method of operating test control system
A semiconductor memory device includes a plurality of memory cells electrically coupled to a plurality of word lines and a word line failure detection unit...
US-9,336,901 Track and hold feedback control of pulsed RF
A system and method of providing feedback control to a pulsed RF generator includes an RF generator having an RF output and a feedback input. An RF electrode is...
US-9,336,900 Shift register and method of driving the same, and group of shift registers and method of driving the same
A shift register circuit is disclosed. In some embodiments, the shift register circuit includes six transistors and no capacitors. A group of such shift...
US-9,336,899 Bidirectional shift register and image display device using the same
A bidirectional shift register capable of performing a stable shift operation in both directions and an image display device using the same are provided. In...
US-9,336,898 Shift register unit, gate driver, and display device
Provided are a shift register unit, a gate driver and a display device. The shift register unit comprises: a pull-up control module, a pull-up module, a reset...
US-9,336,897 Shift register circuit
A shift register circuit comprises a first transistor connected between a clock terminal and an output terminal, a second transistor for charging a control...
US-9,336,896 System and method for voltage regulation of one-time-programmable (OTP) memory programming voltage
An integrated circuit is provided that allows for the use of the same supply voltage pin to receive both a normal operating voltage for the integrated circuit...
US-9,336,895 Memory device, semiconductor unit and method of operating the same, and electronic apparatus
A semiconductor unit with memory devices, each of the memory devices includes: a first semiconductor layer; second and third semiconductor layers; a first...
US-9,336,894 Memory device including nonvolatile memory cell
A memory device may include nonvolatile memory cells. A first memory cell of the nonvolatile memory cells may have a first resistance value in a first state and...
US-9,336,893 Erase algorithm for flash memory
A non-volatile memory device includes a sector pass/fail indicator circuit configured to store a pass/fail indicator for each sector in a first block of memory...
US-9,336,892 Reducing hot electron injection type of read disturb in 3D non-volatile memory
Read disturb due to hot electron injection is reduced in a 3D memory device by controlling the magnitude and timing of word line and select gate ramp down...
US-9,336,891 Look ahead read method for non-volatile memory
A read operation for selected memory cell on a selected word line compensates for program disturb which is a nonlinear function of the data state of an adjacent...
US-9,336,890 Simultaneous programming of many bits in flash memory
A semiconductor device includes: a plurality of memory cells; a plurality of local bit lines connected to respective memory cells of the plurality of memory...
US-9,336,889 Nonvolatile memory system and refresh method
A memory system including non-volatile memory devices and a corresponding refresh method are disclosed. The method groups memory blocks of the non-volatile...
US-9,336,888 Non-volatile memory devices and methods of manufacturing the same
This technology relates to nonvolatile memory devices and methods of manufacturing the same. A nonvolatile memory device can include a memory cell array...
US-9,336,887 Nonvolatile memory device including memory cell array with upper and lower word line groups
A nonvolatile memory device includes a memory cell array having multiple memory blocks. Each memory block includes memory cells arranged at intersections of...
US-9,336,885 Reading and writing to NAND flash memories using charge constrained codes
A charge constrained bit sequence is processed to obtain a lower bound on a number of bit errors associated with the charge constrained bit sequence. The lower...
US-9,336,884 Non-volatile memory device having vertical structure and method of operating the same
A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory...
US-9,336,883 Semiconductor memory device and method of operating the same
A method of operating a semiconductor memory device includes, applying a read voltage to a selected word line to which a selected memory cell is coupled and...
US-9,336,882 Semiconductor storage device and driving method thereof
A memory includes a cell array including nonvolatile memory cells. A power generator generates a power supply voltage for driving the cell array. A receiver...
US-9,336,881 Variable resistance nonvolatile memory device including a variable resistance layer that changes reversibly...
A variable resistance nonvolatile memory device includes: a nonvolatile memory element; an NMOS transistor connected to the nonvolatile memory element; a source...
US-9,336,880 Nonvolatile memory device and method of controlling the same
A nonvolatile memory device comprises a memory cell comprising a variable resistance element connected between a couple of wirings and a control circuit...
US-9,336,879 Multiple phase change materials in an integrated circuit for system on a chip application
A device includes first and second pluralities of memory cells with memory elements and first and second capping materials on the first and second pluralities...
US-9,336,878 Method and apparatus for healing phase change memory devices
A first memory cell including a phase change material. The first memory cell is programmable to store one data value of a plurality of data values. The...
US-9,336,877 Nonvolatile memory device using variable resistive element
A nonvolatile memory device utilizes a variable resistive element. The nonvolatile memory device includes a plurality of banks and first to third write global...
US-9,336,876 Soak time programming for two-terminal memory
Providing for improved programming techniques for endurance and memory retention in two-terminal memory is described herein. In some embodiments, a programming...
US-9,336,875 Memory systems and memory programming methods
Memory systems and memory programming methods are described. In one arrangement, a memory system includes a memory cell configured to have a plurality of...
US-9,336,874 Mixed mode programming for phase change memory
Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a phase change memory.
US-9,336,873 Apparatus for time domain offset cancellation to improve sensing margin resistive memories
Described are apparatuses for time domain offset cancellation. One example of the apparatus includes: a variable resistance memory cell; a reference resistive...
US-9,336,872 Nonvolatile logic and security circuits
In some examples, a nonvolatile storage element may be configured to store a state or value during a low power or powered down period of a circuit. For example,...
US-9,336,871 Resistance change memory
According to one embodiment, a resistance change memory includes the following configuration. A first inverter includes first input and first output terminals...
US-9,336,870 Methods for resistive switching of memristors
The present invention is directed generally to resistive random-access memory (RRAM or ReRAM) devices and systems, as well as methods of employing a thermal...
US-9,336,869 Nonvoltile resistance memory and its operation thereof
A memory cell and the associated array circuits are disclosed. The memory array circuit includes a plurality of memory units, in which each of the memory units...
US-9,336,868 Common plate switching reduction in resistive switching memory devices
Structures and operations of a resistive switching memory device are described herein. In one embodiment, a resistive switching memory device can include: a...
US-9,336,867 Phase change memory coding
An integrated circuit phase change memory can be pre-coded by inducing a first resistance state in some cells and the memory, and a second resistance state and...
US-9,336,866 Storage device and a write method thereof
A write method of a storage device includes determining whether to perform a coarse program operation based on information about memory cells of a memory...
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