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Semiconductor device including work function adjusting element, and method
of manufacturing the same
A semiconductor device has a substrate; and an N-channel MIS transistor and a P-channel MIS transistor provided on the same substrate; each of the N-channel MIS...
Metal stack for reduced gate resistance
A method includes forming an n-FET device and a p-FET device on a substrate, each of the n-FET device and the p-FET device include a metal gate stack consisting...
Fabricating fin structures with doped middle portions
Methods are provided for fabricating fin structures. The methods include: fabricating at least one fin structure, the at least one fin structure having a doped...
Method for fabricating semiconductor device
An exemplary method of fabricating a semiconductor device is provided. First and second hard mask patterns adjacent to each other are formed on a substrate....
Three dimensional (3D) integrated circuits (ICs) (3DICs) and related
Methods for constructing three dimensional integrated circuits and related systems are disclosed. In one aspect, a first tier is constructed by creating active...
Disabling electrical connections using pass-through 3D interconnects and
associated systems and methods
Pass-through 3D interconnects and microelectronic dies and systems of stacked dies that include such interconnects to disable electrical connections are...
Integrated device die and package with stress reduction features
An integrated device die and package is disclosed. The integrated device die includes a unitary body. The unitary body can have an upper portion comprising one...
Dicing wafers having solder bumps on wafer backside
Approaches for hybrid laser scribe and plasma etch dicing process for a wafer having backside solder bumps are described. For example, a method of dicing a...
Method and apparatus for plasma dicing a semi-conductor wafer
The present invention provides a method for plasma processing a substrate, the method comprising providing a process chamber having a wall; providing a plasma...
Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor substrate having two surfaces. First side faces second side and includes recesses, and a plurality of through...
Through-silicon vias and interposers formed by metal-catalyzed wet etching
Provided are methods for making a through-silicon via feature in a silicon substrate and related systems, such as by forming a noble metal structure on a...
Microelectronic devices with through-silicon vias and associated methods
Microelectronic devices with through-silicon vias and associated methods of manufacturing such devices. One embodiment of a method for forming tungsten...
Semiconductor device, fabricating method thereof and semiconductor package
including the semiconductor device
In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The...
Bump-equipped electronic component and method for manufacturing
bump-equipped electronic component
A bump-equipped electronic component includes a circuit substrate and first and second bumps which are disposed on a principal surface of the circuit substrate...
Integrated structure and method for fabricating the same
A method for fabricating integrated structure is disclosed. The method includes the steps of: providing a substrate; forming a through-silicon hole in the...
Three-dimensional memory device with stress compensation layer within a
word line stack
A first stack of alternating layers including first insulating layers and first sacrificial material layers is formed on a substrate. Dielectric oxide layers...
Selective conductive barrier layer formation
A semiconductor device includes a die having a via coupling a first interconnect layer to a trench. The semiconductor device also includes a barrier layer on...
Back end of the line (BEOL) interconnect scheme
The present disclosure relates to a method of forming a back-end-of-the-line metal interconnect layer. The method is performed by depositing one or more...
Wiring structures including spacers and an airgap defined thereby, and
methods of manufacturing the same
A method of manufacturing a wiring structure may include forming a first conductive pattern on a substrate, forming a hardmask on the first conductive pattern,...
Middle of line structures and methods for fabrication
A contact structure includes a permanent antireflection coating formed on a substrate having contact pads. A patterned dielectric layer is formed on the...
SOI structure for signal isolation and linearity
Disclosed is a structure for improved electrical signal isolation between adjacent devices situated in a top semiconductor layer of the structure and an...
Integrated circuit using deep trench through silicon (DTS)
An embodiment radio frequency area of an integrated circuit is disclosed. The radio frequency area includes a substrate having an implant region. The substrate...
Process for transferring a layer
This transfer process comprises the following steps: (a) providing a donor substrate and a support substrate; (b) forming an embrittlement region in the donor...
Anti-slip end effector for transporting workpiece using van der waals
An anti-slip end effector for transporting a workpiece, configured to be attached to a robotic arm, includes: a workpiece-supporting area for placing a...
Substrate holding apparatus and substrate holding method
In accordance with some embodiments of the present disclosure, a substrate holding apparatus is provided. The substrate holding apparatus includes a first...
Substrate-product substrate combination and device and method for
producing a substrate-product substrate...
The invention relates to a substrate for producing a substrate-product substrate combination by aligning, bringing into contact, and bonding a contact side of...
Portable electrostatic chuck carrier for thin substrates
Embodiments of a portable electrostatic chuck for use in a substrate process chamber to support an ultra-thin substrate when disposed thereon are provided...
Electrostatic chuck apparatus
An electrostatic chuck apparatus including: an electrostatic chuck section having one main surface that is a mounting surface on which a plate specimen is...
Replaceable wafer support backstop
A wafer container an enclosure portion including a top wall, a bottom wall, a pair of side walls, a back wall, and a door frame opposite the back wall, the door...
End effector device
The end effector device includes a hand having a storing space, and a plurality of holding portions provided to the hand and configured to respectively...
Method for reducing particle generation at bevel portion of substrate
A method for transporting a substrate using an end effector which mechanically clamps a periphery of the substrate includes: before transporting the substrate,...
Handler for testing semiconductor device with detecting sensors
A handler for testing a semiconductor device which is used when testing the fabricated semiconductor device. The handler for testing a semiconductor device...
End effector device and substrate conveying robot including end effector
An end effector device attached to a tip end portion of a robot arm includes a plurality of support units provided on a blade. Each of the support units...
Vacuum processing apparatus
A vacuum processing apparatus is disclosed for processing workpieces. The apparatus includes a load lock adapted to store the workpiece inside and to be...
Coating method and coating apparatus
A coating head is constructed of a solvent feed mechanism connected to a forward side in a direction of movement of a coating solution feed mechanism, and a gas...
Pick-up method of die bonder and die bonder
When a die to be stripped out of plural dies (semiconductor chips) bonded to a dicing film is to be tossed and stripped from the dicing film, the dicing film...
Device and method for coating a substrate using CVD
The invention relates to a device for coating a substrate using CVD, in particular for coating with diamond or silicon, wherein a neat conductor array composed...
Plasma processing apparatus and plasma processing method
In a plasma processing apparatus including a processing room disposed in a vacuum vessel, a sample stage located in the processing room, a dielectric film...
Cleaning photoresist nozzles for coater module
Methods and systems for cleaning photoresist dispense nozzles of a wafer processing photoresist coater module are disclosed. A method comprises dispensing a...
Electronic component and method for manufacturing electronic component
An electronic component comprises: a resin frame; a semiconductor substrate housed in the resin frame; a plate shape metal member having at least one end fixed...
Wafer level semiconductor package and manufacturing methods thereof
A semiconductor package includes at least one semiconductor die having an active surface, an interposer element having an upper surface and a lower surface, a...
Alignment to multiple layers
A method of aligning a new pattern to more than one previously defined pattern during the manufacture of an integrated circuit. A method of aligning a...
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device provided with a stack of a first film substantially free of oxygen and a second film disposed above the first...
Compositions for polishing aluminum/copper and titanium in damascene
The invention provides a chemical-mechanical polishing composition for polishing a substrate. The polishing composition comprises an oxidizing agent, calcium...
Contact formation in Ge-containing semiconductor devices
A process for creating a contact on a Ge-containing contact region of a semiconductor structure, said process comprising the steps of: providing said...
Photolithographic, thickness non-uniformity, compensation features for
optical photolithographic semiconductor...
A semiconductor structure having a substrate; an active device formed in an active semiconductor region of the substrate, the active device having a control...
Methods for etch of sin films
A method of selectively etching silicon nitride from a substrate comprising a silicon nitride layer and a silicon oxide layer includes flowing a...
CMP slurry composition for polishing an organic layer and method of
forming a semiconductor device using the same
A chemical mechanical polishing (CMP) slurry composition for polishing an organic layer and a method of forming a semiconductor device using the same are...
Trilayer SIT process with transfer layer for FINFET patterning
Improved sidewall image transfer (SIT) techniques are provided. In one aspect, a SIT method includes the following steps. An oxide layer is formed on a...
Resist underlayer film-forming composition which contains alicyclic
skeleton-containing carbazole resin
There is provided a resist underlayer film used in lithography process that has a high n value and a low k value, and can effectively reduce reflection of light...