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Patent # Description
US-9,342,466 Multiple volume encryption of storage devices using self encrypting drive (SED)
A method for encrypting data on a disk drive using self encrypting drive is provided. The method includes encryption of data chunks of a computing device. The...
US-9,342,465 Encrypting data in a flash-based contents-addressable block device
In one aspect, a method includes assigning a base key to a storage array, assigning a volume auxiliary key to each volume in the storage array, for each volume...
US-9,342,464 Social cache
Various embodiments relating to a social cache replacement policy are described. The techniques of the present invention disclosed utilize social network...
US-9,342,463 Management of destage tasks with large number of ranks
A processor, operable in a computing storage environment, for each rank in a storage management device in the computing storage environment, allocates a lower...
US-9,342,462 Systems and methods for implementing low-latency lookup circuits using sparse hash functions
A lookup circuit evaluates hash functions that map keys to addresses in lookup tables. The circuit may include multiple hash function sub-circuits, each of...
US-9,342,461 Cache memory system and method using dynamically allocated dirty mask space
A cache memory system includes a cache memory including a plurality of cache memory lines and a dirty buffer including a plurality of dirty masks. A cache...
US-9,342,460 I/O write request handling in a storage system
An I/O write request handling mechanism in a storage system comprising at least one normal storage device and at least one cache device is provided. For each...
US-9,342,459 Cache management in a mobile device
A user visiting a space is equipped with a mobile device in communication with a service system. Media items held by the service system are associated with...
US-9,342,458 Cache allocation in a computerized system
System and method for operating a solid state memory containing a memory space. The present invention provides a computerized system that includes a solid state...
US-9,342,457 Dynamically modifying durability properties for individual data volumes
A block-based storage system may implement dynamic durability adjustment for page cache write logging. A rate of incoming write requests for data volumes...
US-9,342,456 Storage control program for hierarchy relocation control, storage system with hierarchy relocation control and...
A non-transitory computer readable storage medium that stores a storage control program causing a computer to execute a control process of a storage including a...
US-9,342,455 Cache prefetching based on non-sequential lagging cache affinity
A mechanism is provided in a cache subsystem for cache prefetching based on non-sequential access. The mechanism determines frequently accessed non-sequential...
US-9,342,454 Nested rewind only and non rewind only transactions in a data processing system supporting transactional...
In a multiprocessor data processing system having a distributed shared memory system, first and second nested memory transactions are executed, where the first...
US-9,342,453 Memory channel that supports near memory and far memory access
A semiconductor chip comprising memory controller circuitry having interface circuitry to couple to a memory channel. The memory controller includes first logic...
US-9,342,452 Mapping processor address ranges to persistent storage
A computer apparatus and related method to access storage is provided. In one aspect, a controller maps an address range of a data block of storage into an...
US-9,342,451 Processor management method
A processor management method includes setting a master mechanism in a given processor among multiple processors, where the master mechanism manages the...
US-9,342,450 On-demand hypervisor memory mapping
A mechanism for on-demand hypervisor memory mapping is disclosed. A method of the invention includes trapping an access instruction to a memory location from a...
US-9,342,449 Metadata redundancy schemes for non-volatile memories
Systems and methods are provided for storing data to or reading data from a non-volatile memory ("NVM"), such as flash memory, using a metadata redundancy...
US-9,342,448 Local direct storage class memory access
A queued, byte addressed system and method for accessing flash memory and other non-volatile storage class memory, and potentially other types of non-volatile...
US-9,342,447 Data storage system and method of operating data storage system
A method of operating a data storage device includes providing a memory cell array that includes a first word line, a second word line and a buffer configured...
US-9,342,446 Non-volatile memory system allowing reverse eviction of data updates to non-volatile binary cache
A non-volatile memory system includes a memory section having a non-volatile cache portion storing data in a binary format, a primary user data storage section...
US-9,342,445 System and method for performing a direct memory access at a predetermined address in a flash storage
A flash storage device provides direct memory access based on a first communication protocol. A host selects the first communication protocol and provides a...
US-9,342,444 Log-structured filed system with file branching
Disclosed are systems, computer-readable mediums, and methods for reading a sequence number from regions of a solid state storage device. A latest region is...
US-9,342,443 Systems and methods for memory system management based on thermal information of a memory system
Methods of mapping memory regions to processes based on thermal data of memory regions are described. In some embodiments, a memory controller may receive a...
US-9,342,442 Method of reading and inputting data for testing system and testing system thereof
A method of inputting data for a testing system is disclosed. The method includes coupling an information buffer to a device to be tested, transferring the...
US-9,342,441 Methodology and tool support for test organization and migration for embedded software
A method of establishing traceability for embedded software systems. A design code database is provided for an embedded software system. A test suite database...
US-9,342,440 Test coverage analysis
A test coverage analysis method and corresponding apparatus are disclosed, wherein, by executing the program under test using one or more test cases, generating...
US-9,342,439 Command coverage analyzer
A method and apparatus of a novel command coverage analyzer is disclosed. Combinations of commands, options, arguments, and values of a product are extracted,...
US-9,342,438 Method and system for data-triggered dynamic log level control
Embodiments of the present teachings disclose method, system, and programs for data driven dynamic logging. Data is received by a logging system where the data...
US-9,342,437 Backward post-execution software debugger
A method finds an error in a computer program. A plurality of execution breakpoints are set in the computer program. A portion of the execution of the computer...
US-9,342,436 Capture and display of historical run-time execution traces in a code editor
A program code execution is monitored. Variable type and value information the one or more variables in the program code take during the execution of the...
US-9,342,435 Embedding dynamic information in electronic devices
Disclosure is directed to dynamically creating and embedding code and/or data in an electronic device. In one aspect, data objects are checked for conformance...
US-9,342,434 Revealing new errors in edited code
Under the present invention, a first (e.g., unedited) set of code will be compiled and analyzed to produce a first set of results that includes a set of errors....
US-9,342,433 Elapsed cycle timer in last branch records
A processing device implementing an elapsed cycle timer in last branch records (LBRs) is disclosed. A processing device of the disclosure includes a last branch...
US-9,342,432 Hardware performance-monitoring facility usage after context swaps
A performance monitoring technique provides task-switch immune operation without requiring storage and retrieval of the performance monitor state when a task...
US-9,342,431 Technique to generically manage extensible correlation data
A technique to generically manage extensible correlation data is provided for correlating a series of events. The technique employs a global unique identifier...
US-9,342,430 Method of determining the state of a tile based deferred rendering processor and apparatus thereof
Methods and apparatus for determining the state of a tile based deferred rendering processor are described. The method and apparatus include generating...
US-9,342,429 Counting events using hardware performance counters and annotated instructions
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for receiving a plurality of instructions, where the plurality...
US-9,342,428 Mobile terminal and method for managing the file system thereof
A mobile terminal and a method for managing a file system thereof are provided. The method of managing a file system of a mobile terminal having a battery cover...
US-9,342,427 Multi-function device ID with unique identifier
A computer system that recognizes multi-function devices and associates functions with multi-function devices. Each multi-function device may be represented by...
US-9,342,426 Distributed system, server computer, distributed management server, and failure prevention method
A distributed system according to an exemplary embodiment includes first and second servers capable of executing the same application, wherein when a failure...
US-9,342,425 Test apparatus and test module
In order to efficiently test a plurality of types of devices under test, provided is a test apparatus that tests a device under test, comprising one or more...
US-9,342,424 Optimal test flow scheduling within automated test equipment for minimized mean time to detect failure
The present invention describes a method and system for optimizing a test flow within each ATE (Automated Test Equipment) station. The test flow includes a...
US-9,342,423 Selective restoration of data from non-volatile storage to volatile memory
A method of controlling data transfers between a volatile memory and a non-volatile storage, the volatile memory being on a memory device operatively coupled to...
US-9,342,422 Selectively coupling a PCI host bridge to multiple PCI communication paths
Instead of disabling PCI communication between system resources in a host computing device and I/O devices when a PCI Host Bridge (PHB) is reset, the host...
US-9,342,420 Communication of conditions at a primary storage controller to a host
A primary storage controller is maintained in a copy relationship with a secondary storage controller, wherein the primary and secondary storage controllers are...
US-9,342,419 Persistent messaging mechanism
A method comprising using at least one hardware processor for managing persistent messaging data in a volatile memory, writing the persistent messaging data to...
US-9,342,418 Storage system, storage control device and data transfer method
When a redundancy failures occurs in sequentiality-guaranteed data transfer, data transfer in a short period of time is resumed such that wherein when a factor...
US-9,342,417 Live NV replay for enabling high performance and efficient takeover in multi-node storage cluster
A live non-volatile (NV) replay technique enables a partner node to efficiently takeover a failed node of a high-availability pair in a multi-node storage...
US-9,342,416 Processor and method of controlling execution of processes
A processor includes a plurality of processing sections, each of which executes a predetermined process. A plurality of fault detecting circuits are...
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