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Semiconductor memory device including a memory cell comprising a D/A
A nonvolatile semiconductor device is provided. Each memory cell in a semiconductor device includes a D/A converter and an amplifier transistor. An output...
A semiconductor device comprising: a Metal Oxide Semiconductor Field Effect Transistor including: a semiconductor substrate including a first semiconductor...
Integrated circuit device
An integrated circuit device includes a semiconductor substrate, an active element and a passive element. The active element is made of the semiconductor...
A semiconductor device is provided. The semiconductor device includes a first transistor on a first side of a shallow trench isolation (STI) region and a second...
ESD snapback based clamp for finFET
There is set forth herein a field effect transistor (FET) configured as an ESD protection device. In one embodiment, the FET can be configured to operate in a...
Noise cancellation for a magnetically coupled communication link utilizing
a lead frame
An integrated circuit package includes an encapsulation and a lead frame with a portion of the lead frame disposed within the encapsulation. The lead frame...
Electrostatic discharge protection device
An electrostatic discharge (ESD) protection device is disclosed including at least an NPN transistor and a PNP transistor coupled between a first node and a...
Depletion mode group III-V transistor with high voltage group IV enable
There are disclosed herein various implementations of a half-bridge or multiple half-bridge switch configurations used in a voltage converter circuit using at...
Method of manufacturing semiconductor device, block stacked body, and
sequential stacked body
A method of manufacturing a semiconductor device is provided which is capable of improving productivity and reliability. The method of manufacturing a...
Semiconductor package stack structure having interposer substrate
Provided is a semiconductor package stack structure. The semiconductor package stack structure includes a lower semiconductor package, an interposer substrate...
Doubled substrate multi-junction light emitting diode array structure
The present disclosure provides one embodiment of a light-emitting structure. The light-emitting structure includes a carrier substrate having first metal...
Semiconductor device with face-to-face chips on interposer and method of
manufacturing the same
A method of making a semiconductor device with face-to-face chips on interposer includes the step of attaching a chip-on-interposer subassembly on a heat...
Chip package and method for forming the same
A method for forming a chip package is provided. A first substrate is provided. A second substrate is attached on the first substrate, wherein the second...
Electronic component with sheet-like redistribution structure
An electronic component comprising an electrically conductive chip carrier comprising an electrically insulating core structure at least partially covered with...
Chip stacked package structure and electronic device
A chip stacked package structure includes a first chip and a second chip, where the second chip is stacked with the first chip and the second chip includes a...
Contact arrangements for stackable microelectronic package structures with
An apparatus relates generally to a microelectronic assembly. In this apparatus, a first substrate and a second substrate each have opposing surfaces. Contact...
Method for package-on-package assembly with wire bonds to encapsulation
A microelectronic assembly (10) includes a substrate (12) having a first and second opposed surfaces. A microelectronic element (22) overlies the first surface...
Method of fabricating a semiconductor structure having conductive bumps
with a plurality of metal layers
A conductive bump structure used to be formed on a substrate having a plurality of bonding pads. The conductive bump structure includes a first metal layer...
Jointed structure and method of manufacturing same
A jointed structure comprises a first metal layer and a second metal layer. The first metal layer and the second metal layer are jointed together and have...
Method for making high density substrate interconnect using inkjet
Generally discussed herein are systems and apparatuses that include a dense interconnect bridge and techniques for making the same. According to an example a...
Chip bonding method and driving chip of display
A chip bonding method for bonding a chip on a display panel is provided. The chip includes a joint face, a rear face, input bumps and output bumps. The joint...
Self-aligning conductive bump structure and method of fabrication
A semiconductor device includes a substrate having a major surface and conductive bumps distributed over the major surface of the substrate. Each conductive...
Semiconductor device and method of forming stress-reduced conductive joint
A semiconductor device has a substrate. A first conductive layer is formed over the substrate. A first insulating layer is formed over the substrate. A second...
Front side copper post joint structure for temporary bond in TSV
A method of forming an integrated circuit structure is provided. The method includes providing a substrate, the substrate having a conductive pad thereon. A...
Integrated WLUF and SOD process
This disclosure relates generally to a wafer having a plurality of semiconductor chips having a major surface, a metal contact positioned on one of the...
Microbump and sacrificial pad pattern
Embodiments described herein generally relate to connections for integrated circuit (IC) dies. For example, in an embodiment an integrated circuit (IC) die is...
Integrated antennas in wafer level package
A semiconductor module comprises a wafer package comprising an integrated circuit (IC) device embedded within the wafer package and a layer comprising at least...
Semiconductor integrated device including FinFET device and protecting
A semiconductor integrated device includes a substrate having an active region defined thereon, a plurality of active fins positioned in the active region, and...
Method of manufacturing a semiconductor device
According to one embodiment, a semiconductor device includes a substrate. A semiconductor chip is disposed on a first surface of the substrate. The ...
Semiconductor device with an isolation structure coupled to a cover of the
A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is...
Integrated voltage regulator with embedded passive device(s) for a stacked
A stacked integrated circuit includes a first tier IC and a second tier IC. Active faces of the first tier IC and the second tier IC face each other. An...
Semiconductor device with reduced via resistance
A semiconductor interconnect structure having a first electrically conductive structure having a plurality of bottom portions; a dielectric capping layer, at...
Semiconductor arrangement and formation thereof
A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes an interconnect which includes an interconnect metal...
Semiconductor devices including conductive features with capping layers
and methods of forming the same
Semiconductor devices, methods of manufacture thereof, and methods of forming conductive features thereof are disclosed. A semiconductor device includes an...
Systems and methods to enhance passivation integrity
A semiconductor device having enhanced passivation integrity is disclosed. The device includes a substrate, a first layer, and a metal layer. The first layer is...
Advanced manganese/manganese nitride cap/etch mask for air gap formation
scheme in nanocopper low-K interconnect
After forming a manganese (Mn)-containing cap layer over interconnects embedded in an interlevel dielectric (ILD) layer, a lithographic stack is formed over the...
Reduced height M1 metal lines for local on-chip routing
Systems and methods are directed to an integrated circuit comprising a reduced height M1 metal line formed of an exemplary material with lower mean free path...
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes a first insulating film formed above a semiconductor substrate, a fuse formed above the first insulating film, a second...
Semiconductor package and electronic apparatus including the same
Provided are a curved semiconductor package, and a device including the semiconductor package. The semiconductor package includes: a flexible printed circuit...
Chip-on-film package having bending part
A chip-on-film package comprises a film substrate comprising upper and lower surfaces, and a side having a bending part. A first output interconnection formed...
Semiconductor chip and semiconductor chip package each having signal paths
that balance clock skews
A semiconductor chip is provided. The semiconductor chip includes a first circuit, a second circuit, a third circuit, a first signal path and a second signal...
Semiconductor device package and manufacturing method thereof
Methods and systems for a semiconductor device package with a die to interposer wafer first bond are disclosed and may include bonding a plurality of...
Chip arrangement and method of manufacturing the same
A chip arrangement is provided which comprises a carrier; and at least two chips arranged over the carrier; wherein a continuous insulating layer is arranged...
Singulation method for semiconductor package with plating on side of
A method of singulating semiconductor packages, the method comprising: providing a plurality of semiconductor dies coupled to a single common leadframe, wherein...
Chip having a pillar electrode offset from the bonding pad
The reliability of a semiconductor device is improved. A probe mark is formed on a probe region of a pad covered with a protective insulating film. And, a...
Stacked half-bridge package with a common leadframe
According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input,...
Chip rotated at an angle mounted on die pad region
A package includes: a plurality of lead frames configured to extend inwardly from an outer circumferential portion of the package; a die pad region surrounded...
Semiconductor device and method of manufacturing the same
A method of manufacturing a semiconductor device includes preparing a lead frame provided with a die pad having an upper surface and a plurality of leads being...
Wiring board unit, manufacturing method thereof, and manufacturing method
of wiring board with lead
A wiring board unit includes: a polygonal wiring board having three or more sides in top view, a product insulating part comprising a plurality of external...
Substrate, method of manufacturing substrate, semiconductor device, and
A substrate includes a first insulating layer provided on a base board, a second insulating layer provided on the first insulating layer, a third insulating...