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Patent # Description
US-9,356,124 Method for fabricating multi-gate structure device with source and drain having quasi-SOI structure
A method for fabricating a multi-gate structure device with a source and a drain having a quasi-SOI structure, comprising forming an active region in a shape of...
US-9,356,123 Manufacturing method of low temperature polycrystalline silicon thin film and manufacturing method of thin film...
A manufacturing method of a low temperature polycrystalline silicon thin film and a manufacturing method of a thin film transistor are provided. The...
US-9,356,122 Through silicon via processing method for lateral double-diffused MOSFETs
The present invention features methods for forming a field effect transistor on a semiconductor substrate having gate, source and drain regions, with the gate...
US-9,356,121 Divot-free planarization dielectric layer for replacement gate
After formation of a silicon nitride gate spacer and a silicon nitride liner overlying a disposable gate structure, a dielectric material layer is deposited,...
US-9,356,120 Metal gate transistor and method for tuning metal gate profile
A semiconductor device having arrays of metal gate transistors is fabricated by forming a number of dummy gate structures including a first gate dielectric...
US-9,356,119 MOSFETs with reduced contact resistance
A method and structure for forming a field effect transistor with reduced contact resistance are provided. The reduced contact resistance is manifested by a...
US-9,356,118 Metalization of a field effect power transistor
A metalization of a field effect power transistor having lateral semiconductor layers on an insulator substrate or an intrinsically conducting semiconductor...
US-9,356,117 Method for forming avalanche energy handling capable III-nitride transistors
A method for forming a semiconductor device including a GaN FET, an overvoltage clamping component, and a voltage dropping component. The GaN FET is formed by...
US-9,356,116 Power semiconductor device and method of fabricating the same
There is provided a power semiconductor device, including a first conductive type drift layer; a second conductive type body layer formed on the drift layer, a...
US-9,356,115 Method of manufacturing a semiconductor device
A method of manufacturing an RC-IGBT provided with an IGBT and an FWD on the same substrate is provided. First, top surface device structures of an IGBT and an...
US-9,356,114 Lateral heterojunction bipolar transistor with low temperature recessed contacts
A method of forming the heterojunction bipolar transistor that includes providing a stack of a base layer, an extrinsic base layer, a first metal containing...
US-9,356,113 Method of producing a junction field-effect transistor (JFET)
The invention concerns a method for producing a field effect transistor having a trench gate comprising: --the forming (110) of at least one trench (11, 12, 13)...
US-9,356,112 Charge trapping dielectric structures
A dielectric structure may be arranged having a thin nitrided surface of an insulator with a charge blocking insulator over the nitrided surface. The insulator...
US-9,356,111 Nonvolatile semiconductor memory device and method of manufacturing the same
A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; a tunnel insulating film that is formed on the semiconductor layer...
US-9,356,110 Semiconductor device and manufacturing method thereof
To control a grain growth on laminated polysilicon films, a method of manufacturing a semiconductor device is provided. The method includes: forming a first...
US-9,356,109 Metal gate transistor and integrated circuits
A transistor includes a gate dielectric structure over a substrate and a work function metallic layer over the gate dielectric structure. The work function...
US-9,356,108 Dummy structure for multiple gate dielectric interface and methods
Dummy structures between a high voltage (HV) region and a low voltage (LV) region of a substrate are disclosed, along with methods of forming the dummy...
US-9,356,107 Semiconductor device and production device therefor
A semiconductor device includes a plurality of trench gates extending in a first direction and arranged with a space between one another in a second direction...
US-9,356,106 Method to form self-aligned high density nanocrystals
Methods for fabricating dense arrays of electrically conductive nanocrystals that are self-aligned in depressions at target locations on a substrate, and...
US-9,356,105 Ring gate transistor design for flash memory
A memory device includes a semiconductor body having a first conductivity type, a first terminal in the semiconductor body having a second conductivity type, a...
US-9,356,104 Structure and formation method of semiconductor device with gate stack
A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a gate stack over the...
US-9,356,103 Reduction of edge effects from aspect ratio trapping
A device includes a crystalline material within an area confined by an insulator. In one embodiment, the area confined by the insulator is an opening in the...
US-9,356,102 Double stepped semiconductor substrate
A method for forming a double step surface on a semiconductor substrate includes, with an etching process used in a Metal-Organic Chemical Vapor Deposition...
US-9,356,101 Polycrystalline aluminum nitride base material for crystal growth of GaN-base semiconductor and method for...
There is provided a polycrystalline aluminum nitride substrate that is effective in growing a GaN crystal. The polycrystalline aluminum nitride base material...
US-9,356,100 Semiconductor device
An n-type SiC layer is formed on a front face of an n.sup.+-type SiC substrate and plural p-type regions are selectively formed inside the n-type SiC layer. A...
US-9,356,099 Techniques for forming contacts to quantum well transistors
Techniques are disclosed for providing a low resistance self-aligned contacts to devices formed in a semiconductor heterostructure. The techniques can be used,...
US-9,356,098 Semiconductor device with oxide semiconductor film
To provide a semiconductor device including a transistor in which an oxide semiconductor is used and on-state current is high. In a semiconductor device...
US-9,356,097 Method of forming a bipolar transistor with maskless self-aligned emitter
Embodiments of the present invention include a method for forming a semiconductor emitter and the resulting structure. The invention comprises forming an...
US-9,356,096 Method providing an epitaxial growth having a reduction in defects and resulting structure
Disclosed are methods and resulting structures which provide an opening for epitaxial growth, the opening having an associated projection for reducing the size...
US-9,356,095 Vertical devices and methods of forming
Vertical devices and methods of forming the same are provided. One example method of forming a vertical device can include forming a trench in a semiconductor...
US-9,356,094 Method for making a semi-conducting substrate located on an insulation layer
A method for making a silicon layer extending on an insulation layer, including the steps of forming a silicon-germanium layer on at least a portion of a...
US-9,356,093 Semiconductor device
An isolation region includes an element isolation film and a field plate electrode. The field plate electrode overlaps the element isolation film and surrounds...
US-9,356,092 Semiconductor device and method for manufacturing a semiconductor device
A method includes providing a semiconductor wafer including multiple semiconductor chips, forming a first scribe line on a frontside of the semiconductor wafer,...
US-9,356,091 Method for fabricating optical semiconductor tubes and devices thereof
Semiconductor micro- and nanotubes allow the incorporation of ordered structures such as quantum wells and quantum dots into them providing the potential for...
US-9,356,090 PMOS transistor with improved mobility of the carriers
A substrate includes an active region oriented along a crystallographic face (100) and limited by an insulating region. A MOS transistor includes a channel...
US-9,356,089 Low temperature fabrication of lateral thin film varistor
A structure and method for fabricating a laterally configured thin film varistor surge protection device using low temperature sputtering techniques which do...
US-9,356,088 Active matrix organic light-emitting diode display substrate and display device
The present invention provides an active matrix organic light-emitting diode display substrate and a display device. The active matrix organic light-emitting...
US-9,356,087 Flexible display device with bridged wire traces
There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size...
US-9,356,086 Method for manufacturing organic light emitting display device
An organic light emitting diode (OLED) display includes a substrate where a plurality of pixels are formed, a first pixel defining layer on the substrate, the...
US-9,356,085 Organic light-emitting display apparatus including a shield layer and method of manufacturing the same
An organic light-emitting display apparatus including a shield layer and a method of manufacturing the same are provided. The organic light-emitting display...
US-9,356,084 Display device and method of manufacturing the same
According to one embodiment, a method of manufacturing a display device, includes preparing a first substrate formed such that a first resin layer is formed on...
US-9,356,083 Organic light-emitting display apparatus and method of manufacturing the same
Provided is a method of manufacturing an organic light-emitting display apparatus which may reduce white angular dependency (WAD). The method includes forming a...
US-9,356,082 Display device
To improve image quality of a full-color organic EL display panel. A partition has a stacked structure formed using different materials. A lower partition has a...
US-9,356,081 Organic light emitting display device
An organic light emitting display device comprises a driving transistor for driving an organic light emitting diode; a first transistor controlled by a scan...
US-9,356,080 Organic EL display device and electronic apparatus
An organic EL display device includes a display region where a plurality of pixels having a light-emitting device stacked in order of an organic layer including...
US-9,356,079 Organic light-emitting display apparatus and method of manufacturing the same
An organic light-emitting display apparatus includes a substrate, an optical layer formed over the substrate and a light emitting pixel formed over the optical...
US-9,356,078 High aperture ratio organic light emitting diode display having double bank structure
The present disclosure relates to an organic light emitting diode display having high aperture ratio. The present disclosure suggests an organic light emitting...
US-9,356,077 Light-emitting element display device
A light-emitting element display device includes a substrate including a display area having plural pixels arranged in matrix form, a lower electrode provided...
US-9,356,076 Organic light emitting diode display including sensors
An organic light emitting diode display including a pixel that includes a light-emitting device and a first thin film transistor connected to the light-emitting...
US-9,356,075 Organic EL display device
An organic EL display device includes a thin film transistor substrate in which a light-emitting element is provided for each of plural sub-pixels constituting...
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