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Transformer with improved power handling capacity
Disclosed is an electrical transformer for improved transformer power capacity and efficiency designed by the application of disclosed design considerations....
Methods for manufacturing magnetic components
A method in accordance with an embodiment comprises forming a feature on a substrate, disposing a first conductive pattern on the substrate and the feature,...
Battery removal tool
A battery removal tool including a cylindrical housing having a front segment and a back segment, an opening continuously disposed within a front end of the...
Undulator with dynamic compensation of magnetic forces
A method and apparatus for implementing dynamic compensation of magnetic forces for undulators are provided. An undulator includes a respective set of magnet...
Coil for cordless charging and cordless charging apparatus using the same
There are provided a coil for cordless charging, which may be formed as a thin coil in spite of the presence of a plurality of coils included therein, and a...
Nano particle/polyamide composite material, preparation method therefor,
and use thereof
A nano particle/polyamide composite material, a preparation method, and a use thereof are disclosed. The nano particle/polyamide composite material includes...
Magnetoelectric control of superparamagnetism
A magnetoelectric composite device having a free (i.e. switchable) layer of ferromagnetic nanocrystals mechanically coupled a ferroelectric single crystal...
Electronic protection component
An electronic protection component comprises an outer case bounding an outer cavity therein; a varistor with a first varistor lead connected to a first varistor...
Ceramic electronic component and method for manufacturing ceramic
A ceramic electronic component includes a ceramic body and first and second outer electrodes. The first and second outer electrodes respectively include first...
Method for fabrication of crack-free ceramic dielectric films
The invention provides a process for forming crack-free dielectric films on a substrate. The process comprises the application of a dielectric precursor layer...
Integrating optical fiber with coaxial cable
Certain embodiments herein relate to a hybrid cable that includes a center conductor for distributing electrical signals and one or more optical fibers adjacent...
Category 8 cable
A high speed Ethernet cable constructed of two groups of two twisted wire pairs each. The two groups radiationally isolated from each other by one or more foil...
Helical tensioner for tension members
A tensioner structured to shorten the effective length of a tension member is provided. The tensioner has a body with an outer surface and a generally helical...
Electrical cable fitted with a theft deterrence means
The invention relates to an electrical cable (1, 10) comprising at least two conducting strands (2, 3) and theft deterrence means in the form of a marking (8)....
Nested shielded ribbon cables
The disclosure generally relates to nested shielded ribbon cables that form an electrical cable assembly (200). The electrical cable assembly (200) includes...
High speed transmission cable
The present invention relates to a high speed transmission cable (100A) that includes a first conductor set (110), a dielectric film (120A) at least partially...
Electroconductive polyamide/polyphenylene ether resin composition and
molded product for vehicle using the same
An electroconductive polyamide/polyphenylene ether resin composition and a molded product for vehicle manufactured using the same includes a base resin (a)...
Conductive liquid crystalline polymer composition
A liquid crystalline polymer composition that is thermally and/or electrically conductive and has a reduced tendency to create a static electric charge during a...
Irradiation field-limiting apparatus, X-ray-generating unit including the
irradiation field-limiting apparatus,...
An irradiation field-limiting apparatus connected to an X-ray-generating apparatus includes a pair of first limiting blades defining a width of an opening...
Multi-electrode stack arrangement
The invention relates to an electrode stack (70) comprising stacked electrodes (71-80) for manipulating a charged particle beam along an optical axis (A). Each...
System and method for optical confinement of atomic particles
A system and method for controlling atomic particles using projected light are provided. In some aspects, a method includes providing a plurality of atomic...
Device for the dry handling of nuclear fuel assemblies
A device for the dry handling of nuclear fuel assemblies is provided. The device includes a transfer basket which can be connected to a lifter and which...
A rotary actuator has a driven element including a plurality of recesses that are spaced in a circumferential arrangement around an axis of rotation of the...
Light-water reactor fuel assembly (alternatives), a light-water reactor,
and a fuel element of fuel assembly
A 17.times.17 jacketless fuel assembly for a PWR-type light-water reactor uses thorium as the fuel. The fuel assembly has a square shape in the plan view, a...
Built-in testing of unused element on chip
Embodiments relate to built-in testing of an unused element on a chip. An aspect includes concurrently performing on a chip comprising a plurality of chip...
The BIST circuit includes an address data converting circuit that receives the logical address signal, the logical data signal, and the logical expected value...
Dynamic memory signal phase tracking method and associated control circuit
A dynamic memory signal phase tracking method is provided. The method, applied to a memory controller that accesses a memory module, includes: issuing a memory...
Memory array test logic
A test circuit for a static random access memory (SRAM) array includes a plurality of stages coupled in a ring. Each stage includes a plurality of bit cells to...
Sampling device with time-interleaved optical clocking
A sampling device comprising a first input port and a second input port, wherein an input-signal is fed to the first input port and wherein an optical clock...
Display apparatus having a gate drive circuit
A gate drive circuit includes a shift register having a plurality of stages, in which an n-th stage (`n` is a natural number) of the plurality of stages is...
Semiconductor nonvolatile memory device with one-time programmable
A semiconductor nonvolatile memory device of an embodiment includes: a plurality of transistors arranged in a matrix, the transistors in the same row being...
Bitline circuits for embedded charge trap
A bitline circuit for embedded Multi-Time-Read-Only-Memory including a plurality of NMOS memory cells coupled to a plurality of wordlines in each row, bitlines...
Nonvolatile memory system and operating method of memory controller
An operating method of a memory controller configured to control a nonvolatile memory device including a plurality of memory cells is provided. The operating...
Semiconductor memory device
A semiconductor memory device includes a block including a plurality of string units, each including a plurality of memory cells electrically connected in...
Vertical memory cells and methods of operation
A method of operating a memory device can include accessing at least one memory cell of a memory cell pair formed in opposing vertical sides of an opening by...
Data recovery in a 3D memory device with a short circuit between word
Techniques for detecting word line layers which are shorted together due to a defect in a three-dimensional stack memory device, and for recovering data. The...
Sensing circuits for use in low power nanometer flash memory devices
Improved sensing circuits for use in low power nanometer flash memory devices are disclosed.
Memory sensing system comprising nonvolatile memory device and related
method of operation
A memory system performs a first sensing operation to sense whether multi-level cells assume an on-cell state or an off-cell state in response to a first read...
Latch initialization for a data storage device
A data storage device may include a memory die. The memory die includes a memory and a latch. A method may include receiving a command corresponding to a write...
Semiconductor memory device and data erasing method
A semiconductor memory device includes a memory cell array including a plurality of groups of memory cells above a substrate, the groups including a first group...
Mapping between program states and data patterns
The present disclosure includes methods and apparatuses for mapping between program states and data patterns. One method includes: programming a group of G...
Non-volatile memory device
A non-volatile memory device includes: a floating gate having a plurality of fingers; a first coupling unit including an active control gate which overlaps with...
Very dense nonvolatile memory bitcell
An asymmetric non-volatile memory bitcell is described. The bitcell comprises source and drain regions comprising carriers of the same conductivity type. A...
Three-dimensional memory structure having a back gate electrode
A memory stack structure includes a cavity including a back gate electrode, a back gate dielectric, a semiconductor channel, and at least one charge storage...
EPROM cell array, method of operating the same, and memory device
including the same
An EPROM cell array includes a cell array including multiple unit cells, each of which includes a MOSFET having a floating gate, and which are disposed in an...
Non-volatile memory and method of operating the same
A memory structure including a memory array of a plurality of memory cells arranged in rows and columns, the plurality of memory cells including a pair of...
Memory system comprising nonvolatile memory device and method of adjusting
read voltage based on sub-block...
A method of operating a nonvolatile memory device configured to erase a memory block in sub-block units comprises detecting state information of unselected...
Semiconductor device including a non-volatile memory preserving data
stored in a volatile memory when powered off
A semiconductor device may include a controller configured to generate a data retention path control signal in response to a power condition change signal. The...
Method of writing data of a nonvolatile semiconductor memory device
including setting and removing operations
A nonvolatile semiconductor memory device according to an embodiment comprises: a memory cell array including a plurality of memory cells provided one at each...
Resistive memory device and operating method
A method of operating a memory device includes; applying a pre-write voltage to a selected memory cell by applying a first voltage to a first signal line...