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Patent # Description
US-9,368,674 Method and apparatus for creating a W-mesa street
A method for fabricating an epitaxial structure includes providing a wafer comprising one or more epitaxial layers. The wafer is divided into dice where the...
US-9,368,673 Method for manufacturing light emitting diode package
A method for manufacturing a light emitting diode (LED) package, the method includes providing an LED chip and forming electrodes on a top surface of the LED...
US-9,368,672 Removal of 3D semiconductor structures by dry etching
Various embodiments include methods of fabricating a semiconductor device that include providing a plurality of nanostructures extending away from a support,...
US-9,368,671 Bifacial tandem solar cells
A method of fabricating on a semiconductor substrate bifacial tandem solar cells with semiconductor subcells having a lower bandgap than the substrate bandgap...
US-9,368,670 GaAs thin films and methods of making and using the same
Disclosed herein are embodiments of methods for making GaAs thin films, such as photovoltaic GaAs thin films. The methods disclosed herein utilize sources,...
US-9,368,669 Method and apparatus for reducing signal loss in a photo detector
Photonic structures and methods of formation are disclosed in which a photo detector interface having crystalline misfit dislocations is displaced with respect...
US-9,368,668 Photoelectric conversion device manufacturing method, photoelectric conversion device, and imaging system
A method comprises preparing a semiconductor substrate having a first portion, and a second portion including a first region and a second region; forming an...
US-9,368,667 Plasmon field effect transistor
A field effect transistor (FET) is provided. The FET includes a first material layer, second material layer and a third material layer. The third material layer...
US-9,368,666 Solar cell with reduced absorber thickness and reduced back surface recombination
Manufacture for an improved stacked-layered thin film solar cell. Solar cell has reduced absorber thickness and an improved back contact for Copper Indium...
US-9,368,665 Solar cell module
A solar cell module includes multiple rectangular solar cells each with chamfered corner portions, wiring members each electrically connecting adjacent ones of...
US-9,368,664 Biaxially stretched polyester film for protecting back surface of solar cell, and method for producing...
A biaxially stretched polyester film for protecting a back surface of a solar cell, containing a polyester resin that is polymerized with addition of a Ti...
US-9,368,663 Solar cell sealing film and solar cell using the sealing film
The object of the present invention is to provide a solar cell sealing film obtained from a composition comprising chiefly ethylene-vinyl acetate copolymer and...
US-9,368,662 Photovoltaic junction for a solar cell
A photovoltaic junction for a solar cell is provided. The photovoltaic junction has an intrinsic region comprising a multiple quantum well stack formed from a...
US-9,368,661 Photodetector
A photodetector 1A comprises a multilayer structure 3 having a first layer 4 constituted by first metal or first semiconductor, a semiconductor structure layer...
US-9,368,660 Capping layers for improved crystallization
Techniques for fabrication of kesterite Cu--Zn--Sn--(Se,S) films and improved photovoltaic devices based on these films are provided. In one aspect, a method of...
US-9,368,659 Back contact design for solar cell, and method of fabricating same
A method includes depositing spacers at a plurality of locations directly on a back contact layer over a solar cell substrate. An absorber layer is formed over...
US-9,368,658 Serpentine IR sensor
In one embodiment, a MEMS sensor includes a mirror and an absorber spaced apart from the mirror, the absorber including a plurality of spaced apart conductive...
US-9,368,657 Solar cell
A solar cell and a method of fabricating a solar cell. A solar cell including a substrate; a first electrode layer on the substrate; a light absorbing layer on...
US-9,368,656 Back contacted photovoltaic cell with an improved shunt resistance
The invention relates to a photovoltaic cell, comprising a plate shaped substrate of a semiconductor material with a solar face and a connection face, a first...
US-9,368,655 Solar cell and method for manufacturing the same
A solar cell includes a substrate, an emitter region which is positioned at the substrate and having a first sheet resistance, a first highly doped region which...
US-9,368,654 Photodetector and method for manufacturing the same
A photodetector includes a substrate and an insulating arrangement formed in the substrate. The insulating arrangement electrically insulates a confined region...
US-9,368,653 Silicon photonics integration method and structure
Approaches for silicon photonics integration are provided. A method includes: forming at least one encapsulating layer over and around a photodetector;...
US-9,368,652 Controlling the direct current flow in a photovoltaic system
The present invention relates to a control device for controlling a direct current generated in a photovoltaic system. The control device is configured to...
US-9,368,651 Buss bar strip
A buss bar strip for mounting to a solar panel to electrically connect to a series of electrical lines extending from solar cells. The buss bar strip can...
US-9,368,650 SiC junction barrier controlled schottky rectifier
A SiC junction barrier controlled Schottky rectifier includes a SiC substrate, a n-type drift layer, a p-type doping region, a plurality of junction...
US-9,368,649 Schottky barrier diode and method of manufacturing the same
A schottky barrier diode includes an n- type epitaxial layer disposed at a first surface of an n+ type silicon carbide substrate, a plurality of n type pillar...
US-9,368,648 Active diode having no gate and no shallow trench isolation
An active diode with fast turn-on time, low capacitance, and low turn-on resistance may be manufactured without a gate and without a shallow trench isolation...
US-9,368,647 Compositions for etching
Etching compositions are provided. The etching composition includes a phosphoric acid, ammonium ions and a silicon compound material. The silicon compound...
US-9,368,646 Memory devices and methods of manufacturing the same
A vertical memory device includes a channel array, a charge storage layer structure, multiple gate electrodes and a dummy pattern array. The channel array...
US-9,368,645 Nonvolatile memory device and method of fabricating the same
This technology relates to a nonvolatile memory device and a method of fabricating the same. The nonvolatile memory device may include a pipe connection gate...
US-9,368,644 Gate formation memory by planarization
Semiconductor devices and methods of producing the devices are disclosed. The devices are formed by forming a gate structure on a substrate. The gate structure...
US-9,368,642 Semiconductor device and method of fabricating the same
The purpose of the present invention is to provide a reliable semiconductor device comprising TFTs having a large area integrated circuit with low wiring...
US-9,368,641 Transistor and display device
It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a...
US-9,368,640 Transistor with stacked oxide semiconductor films
Objects are to provide a semiconductor device for high power application in which a novel semiconductor material having high productivity is used and to provide...
US-9,368,639 Oxide semiconductor thin film, production method thereof, and thin film transistor
An oxide crystalline thin film is used to provide an oxide semiconductor thin film that has comparatively high carrier mobility and is suitable as TFT channel...
US-9,368,638 Semiconductor device
An object is to provide a highly reliable transistor and a semiconductor device including the transistor. A semiconductor device including a gate electrode; a...
US-9,368,637 Thin film transistor and manufacturing method thereof, array substrate and display device
A thin film transistor (TFT) and manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor comprises a...
US-9,368,636 Method for manufacturing a semiconductor device comprising a plurality of oxide semiconductor layers
A substrate having an insulating surface is prepared; a stacked film including a first oxide semiconductor layer and a second oxide semiconductor layer is...
US-9,368,635 Array substrate, method for manufacturing the same and display device
A manufacturing method of an array substrate, comprising the following steps: S1: forming a pattern comprising a semiconductor layer (2), a gate insulating...
US-9,368,634 Display panel, thin film transistor and method of fabricating the same
A thin film transistor (TFT) including a gate, a dielectric layer, a metal-oxide semiconductor channel, a source, and a drain is provided. The gate and the...
US-9,368,633 Oxide material and semiconductor device
An object is to provide a material suitably used for a semiconductor included in a transistor, a diode, or the like. Another object is to provide a...
US-9,368,631 Thin film transistor and display panel including the same
Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and...
US-9,368,630 Thin film transistor and method for manufacturing thin film transistor
A thin film transistor is disclosed. The drain and source electrode layer of the thin film transistor is disposed on the substrate, in which the drain and...
US-9,368,629 Diode structure compatible with FinFET process
An embodiment integrated circuit (e.g., diode) and method of making the same. The embodiment integrated circuit includes a well having a first doping type...
US-9,368,628 FinFET with high mobility and strain channel
An integrated circuit device includes a fin having a gate area beneath a gate electrode structure, a source/drain region disposed beyond ends of the fin, and a...
US-9,368,627 Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; and a stress memorization technology (SMT) sidewall...
US-9,368,626 Semiconductor device with strained layer
A semiconductor device and method of fabricating thereof is described that includes a substrate including at least one fin, at least one gate stack formed on a...
US-9,368,625 NAND string utilizing floating body memory cell
NAND string configurations and semiconductor memory arrays that include such NAND string configurations are provided. Methods of making semiconductor memory...
US-9,368,624 Method for fabricating a transistor with reduced junction leakage current
A transistor and method of fabrication thereof includes a screening layer formed at least in part in the semiconductor substrate beneath a channel layer and a...
US-9,368,623 High voltage device fabricated using low-voltage processes
A high-voltage transistor includes an active region including a diffused region of a first conductivity type defined by inner edges of a border of shallow...
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