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Wire-bonding apparatus and method of manufacturing semiconductor device
Provided is a wire-bonding apparatus (10) including: a capillary (28) through which a wire (30) is inserted; a nonsticking determination circuit (36) configured...
Coated bonding wire and methods for bonding using same
A semiconductor device includes a bond formed on a bond pad. The bond is formed of a wire that includes a central core of conductive metal, a first coating over...
Electronic component package and method of manufacturing same
There is provided a method for manufacturing an electronic component package. The method includes the steps: (i) disposing a metal pattern layer on an adhesive...
Thin integrated circuit chip-on-board assembly
An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface, where the first surface of the insulating...
Substrate structure and semiconductor package using the same
A substrate structure is provided, including a substrate body and a plurality of circuits formed on the substrate body. At least one of the circuits has an...
Bump I/O contact for semiconductor device
A bump contact electrically connects a conductor on a substrate and a contact pad on a semiconductor device mounted to the substrate. The first end of an...
Method of forming bump pad structure having buffer pattern
The method includes forming an upper layer on a lower layer, forming a metal interconnection in the upper layer, forming a passivation layer exposing a center...
Electronic component, mother substrate, and electronic component
An electronic component includes a plurality of electrodes provided in a rectangular or substantially rectangular box-shaped area on an upper surface of a...
Technique capable of achieving reliability improvement of a semiconductor device even if temperature rising of an operation guarantee temperature of the...
Methods and apparatus of packaging semiconductor devices
Methods and apparatuses for wafer level packaging (WLP) of semiconductor devices are disclosed. A contact pad of a circuit may be connected to a solder bump by...
Contact pads for integrated circuit packages
Disclosed herein are contact pads for use with integrated circuit (IC) packages. In some embodiments, a contact pad disclosed herein may be disposed on a...
Fan-out interconnect structure and method for forming same
A method embodiment includes forming a sacrificial film layer over a top surface of a die, the die having a contact pad at the top surface. The die is attached...
Semiconductor chip with seal ring and sacrificial corner pattern
A semiconductor device including a low dielectric constant film of which the relative dielectric constant is less than 3.5, is provided with one or more seal...
Die-on-interposer assembly with dam structure and method of manufacturing
A semiconductor package includes an interposer chip having a frontside, a backside, and a corner area on the backside defined by a first corner edge and a...
A high-frequency package includes an MMIC including a signal source and a conductor pattern that is connected to the signal source, a substrate having a signal...
Semiconductor package having EMI shielding and method of fabricating the
A semiconductor package includes a dielectric layer in which a chip is embedded, interconnection parts disposed on a first surface of the dielectric layer,...
Electromagnetic interference shield for semiconductor chip packages
An electromagnetic interference shield is described for semiconductor chip packages. In some embodiments, a package has a semiconductor die. a redistribution...
Semiconductor device with shielding layer in post-passivation interconnect
A semiconductor device includes a semiconductor substrate, a dielectric layer, a passivation layer, a protective layer, a post-passivation interconnect (PPI)...
Overlay mark dependent dummy fill to mitigate gate height variation
A method of forming dummy structures and an overlay mark protection zone over an active layer zone based on the shape of an overlay mark and the resulting...
Metal conductor chemical mechanical polish
The present disclosure provides a method of fabricating a semiconductor device, a semiconductor device fabricated by such a method, and a chemical mechanical...
Multichip module with reroutable inter-die communication
A multichip module (MCM) has redundant I/O connections between its dice. That is, the number of inter-die I/O connections used is larger than the number of...
Integrated device package comprising bridge in litho-etchable layer
An integrated device package includes a first die, a second die, an encapsulation portion coupled to the first die and the second die, and a redistribution...
Metal-containing films as dielectric capping barrier for advanced
A method is provided for forming an interconnect structure for use in semiconductor devices. The method starts with forming a low-k bulk dielectric layer on a...
Electronic device and method for production
An electronic device and method for production is disclosed. One embodiment provides an integrated component having a first layer which is composed of copper or...
Self aligned contact formation
The present disclosure relates to methods of forming a self-aligned contact and related apparatus. In some embodiments, the method forms a plurality of gate...
E-fuse structure of semiconductor device
Provided is an e-fuse structure of a semiconductor device. the e-fuse structure may include a fuse link formed of a first metal material to connect a cathode...
A method for creating structures in a semiconductor assembly is provided. The method includes etching apertures into a dielectric layer and applying a polymer...
Memory metal scheme
A memory includes a plurality of memory cells. A first line is over the plurality of memory cells. The first line in a first layout section includes a first...
Method for manufacturing an interposer, interposer and chip package
A method for manufacturing an interposer includes the following steps. Conductive beads is filled in a blind via of a substrate and a solder layer of each...
Electronic component and method for fabricating the same
An electronic component and a method for fabricating the electronic component are provided. The electronic component includes a carrier, a first metal layer, a...
Embedded coaxial wire and method of manufacture
A method of manufacturing an integrated circuit package substrate is disclosed. The method may include forming a hole through a substrate layer in the package...
Substrate build up layer to achieve both finer design rule and better
Embodiments of the invention generally relate to package substrates for integrated circuits. The package substrates each include a core having electrically...
Package on package (PoP) bonding structures
Various embodiments of mechanisms for forming through package vias (TPVs) with multiple conductive layers and/or recesses in a die package and a package on...
High density package interconnects
Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die...
Source down semiconductor devices and methods of formation thereof
A method for forming a semiconductor device includes forming device regions in a semiconductor substrate having a first side and a second side. The device...
In an embodiment, an electronic component includes a dielectric layer, a semiconductor device embedded in the dielectric layer, an electrically conductive...
In an embodiment, an electronic component includes a housing, a die pad having a first surface and a second surface opposing the first surface, a first high...
Method and apparatus for mounting solder balls to an exposed pad or
terminal of a semiconductor package
Embodiments of the present disclosure provide a package comprising a die attach pad, a die disposed on the die attach pad and a leadframe. The leadframe...
Semiconductor device and manufacturing method of semiconductor device
A technique capable of enhancing a reliability of a semiconductor device is provided. A semiconductor device has a die pad on which a semiconductor chip is...
A semiconductor apparatus has a configuration in which multiple copper wiring layers and multiple insulating layers are alternately layered. A low-impedance...
Semiconductor device and semiconductor device fabrication method
A multilayer wiring in a semiconductor device includes a first lower wiring formed in a first insulating layer, a via which is formed in a second insulating...
Interposer for hermetic sealing of sensor chips and for their integration
with integrated circuit chips
Integration of sensor chips with integrated circuit (IC) chips. At least a first sensor chip including a first sensor is affixed to a first side of an...
Dielectric wafer level bonding with conductive feed-throughs for
electrical connection and thermal management
A method for fabricating semiconductor and electronic devices at the wafer level is described. In this method, dielectric material is used to wafer bond a...
Integrated circuit film and method of manufacturing the same
An integrated circuit film and a method of manufacturing the same are disclosed. The integrated circuit film includes a circuit board containing a circuit...
Piezoelectric fan and air cooling apparatus using the piezoelectric fan
A piezoelectric fan includes a vibration plate one end of which in a length direction is supported in a fixed manner and the other end of which in the length...
Embedded heat spreader with electrical properties
Embodiments of the invention relate to incorporating one or more antennas or inductor coils into a semi-conductor package. A heat spreader or metal sheet is...
Method of fabricating a semiconductor device used in a stacked-type
A method of fabricating a semiconductor device includes the steps of providing a heat-resistant sheet on an interposer so as to cover electrode terminals...
Semiconductor device and method of using substrate with conductive posts
and protective layers to form embedded...
A semiconductor device has a substrate including a base and a plurality of conductive posts extending from the base. A semiconductor die is disposed on a...
Absorbing excess under-fill flow with a solder trench
One embodiment sets forth an integrated circuit package that includes a substrate, one or more devices mounted on the substrate, a layer of under-fill...
Under-fill material and method for producing semiconductor device
The present invention provides an under-fill material with which a semiconductor device having a high connection reliability can be provided while securing a...